Adding more ARM assembly stubs.

sr_arm/op_contain.s

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+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+	.align	2
+	.global	op_contain
+	.type	op_contain, %function
+op_contain:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	op_contain, .-op_contain

sr_arm/op_currtn.s

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+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+	.align	2
+	.global	op_currtn
+	.type	op_currtn, %function
+op_currtn:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	op_currtn, .-op_currtn

sr_arm/op_equ.s

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+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+	.align	2
+	.global	op_equ
+	.type	op_equ, %function
+op_equ:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	op_equ, .-op_equ

sr_arm/op_equnul.s

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+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+	.align	2
+	.global	op_equnul
+	.type	op_equnul, %function
+op_equnul:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	op_equnul, .-op_equnul

sr_arm/op_exfun.s

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+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+	.align	2
+	.global	op_exfun
+	.type	op_exfun, %function
+op_exfun:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	op_exfun, .-op_exfun

sr_arm/op_extcall.s

@@ -0,0 +1,27 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+	.align	2
+	.global	op_extcall
+	.type	op_extcall, %function
+op_extcall:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	op_extcall, .-op_extcall

sr_arm/op_extexfun.s

@@ -0,0 +1,27 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+	.align	2
+	.global	op_extexfun
+	.type	op_extexfun, %function
+op_extexfun:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	op_extexfun, .-op_extexfun

sr_arm/op_extjmp.s

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+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+	.align	2
+	.global	op_extjmp
+	.type	op_extjmp, %function
+op_extjmp:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	op_extjmp, .-op_extjmp