Adding more ARM assembly stubs.

sr_arm/opp_break.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_break
+	.type	opp_break, %function
+opp_break:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_break, .-opp_break

sr_arm/opp_commarg.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_commarg
+	.type	opp_commarg, %function
+opp_commarg:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_commarg, .-opp_commarg

sr_arm/opp_hardret.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_hardret
+	.type	opp_hardret, %function
+opp_hardret:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_hardret, .-opp_hardret

sr_arm/opp_inddevparms.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_inddevparms
+	.type	opp_inddevparms, %function
+opp_inddevparms:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_inddevparms, .-opp_inddevparms

sr_arm/opp_indfnname.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indfnname
+	.type	opp_indfnname, %function
+opp_indfnname:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indfnname, .-opp_indfnname

sr_arm/opp_indfun.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indfun
+	.type	opp_indfun, %function
+opp_indfun:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indfun, .-opp_indfun

sr_arm/opp_indget.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indget
+	.type	opp_indget, %function
+opp_indget:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indget, .-opp_indget

sr_arm/opp_indglvn.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indglvn
+	.type	opp_indglvn, %function
+opp_indglvn:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indglvn, .-opp_indglvn

sr_arm/opp_indincr.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indincr
+	.type	opp_indincr, %function
+opp_indincr:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indincr, .-opp_indincr

sr_arm/opp_indlvadr.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indlvadr
+	.type	opp_indlvadr, %function
+opp_indlvadr:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indlvadr, .-opp_indlvadr

sr_arm/opp_indlvarg.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indlvarg
+	.type	opp_indlvarg, %function
+opp_indlvarg:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indlvarg, .-opp_indlvarg

sr_arm/opp_indlvnamadr.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indlvnamadr
+	.type	opp_indlvnamadr, %function
+opp_indlvnamadr:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indlvnamadr, .-opp_indlvnamadr

sr_arm/opp_indmerge.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indmerge
+	.type	opp_indmerge, %function
+opp_indmerge:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indmerge, .-opp_indmerge

sr_arm/opp_indo2.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indo2
+	.type	opp_indo2, %function
+opp_indo2:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indo2, .-opp_indo2

sr_arm/opp_indpat.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indpat
+	.type	opp_indpat, %function
+opp_indpat:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indpat, .-opp_indpat

sr_arm/opp_indrzshow.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indrzshow
+	.type	opp_indrzshow, %function
+opp_indrzshow:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indrzshow, .-opp_indrzshow

sr_arm/opp_indset.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indset
+	.type	opp_indset, %function
+opp_indset:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indset, .-opp_indset

sr_arm/opp_indtext.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_indtext
+	.type	opp_indtext, %function
+opp_indtext:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_indtext, .-opp_indtext

sr_arm/opp_iretmval.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_iretmval
+	.type	opp_iretmval, %function
+opp_iretmval:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_iretmval, .-opp_iretmval

sr_arm/opp_newintrinsic.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_newintrinsic
+	.type	opp_newintrinsic, %function
+opp_newintrinsic:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_newintrinsic, .-opp_newintrinsic

sr_arm/opp_newvar.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_newvar
+	.type	opp_newvar, %function
+opp_newvar:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_newvar, .-opp_newvar

sr_arm/opp_ret.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_ret
+	.type	opp_ret, %function
+opp_ret:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_ret, .-opp_ret

sr_arm/opp_rterror.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_rterror
+	.type	opp_rterror, %function
+opp_rterror:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_rterror, .-opp_rterror

sr_arm/opp_svput.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_svput
+	.type	opp_svput, %function
+opp_svput:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_svput, .-opp_svput

sr_arm/opp_tcommit.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_tcommit
+	.type	opp_tcommit, %function
+opp_tcommit:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_tcommit, .-opp_tcommit

sr_arm/opp_trestart.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_trestart
+	.type	opp_trestart, %function
+opp_trestart:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_trestart, .-opp_trestart

sr_arm/opp_trollback.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_trollback
+	.type	opp_trollback, %function
+opp_trollback:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_trollback, .-opp_trollback

sr_arm/opp_tstart.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_tstart
+	.type	opp_tstart, %function
+opp_tstart:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_tstart, .-opp_tstart

sr_arm/opp_xnew.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_xnew
+	.type	opp_xnew, %function
+opp_xnew:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_xnew, .-opp_xnew

sr_arm/opp_zcont.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_zcont
+	.type	opp_zcont, %function
+opp_zcont:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_zcont, .-opp_zcont

sr_arm/opp_zg1.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_zg1
+	.type	opp_zg1, %function
+opp_zg1:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_zg1, .-opp_zg1

sr_arm/opp_zgoto.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_zgoto
+	.type	opp_zgoto, %function
+opp_zgoto:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_zgoto, .-opp_zgoto

sr_arm/opp_zstepret.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_zstepret
+	.type	opp_zstepret, %function
+opp_zstepret:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_zstepret, .-opp_zstepret

sr_arm/opp_zstepretarg.s

@@ -0,0 +1,30 @@
+#################################################################
+#								#
+#	Copyright 2001 Sanchez Computer Associates, Inc.	#
+#								#
+#	This source code contains the intellectual property	#
+#	of its copyright holder(s), and is made available	#
+#	under a license.  If you do not know the terms of	#
+#	the license, please stop and do not read further.	#
+#								#
+#################################################################
+
+	.arch armv6
+	.fpu vfp
+	.text
+
+	.align	2
+	.global	opp_zstepretarg
+	.type	opp_zstepretarg, %function
+opp_zstepretarg:
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 1, uses_anonymous_args = 0
+	@ link register save eliminated.
+	str	fp, [sp, #-4]!
+	add	fp, sp, #0
+	mov	r3, #0
+	mov	r0, r3
+	add	sp, fp, #0
+	ldmfd	sp!, {fp}
+	bx	lr
+	.size	opp_zstepretarg, .-opp_zstepretarg