Compare commits

...

24 Commits

Author SHA1 Message Date
Luis Ibanez 75b15be585 Now dispatching to getframe or trans_code.
Still needs to reverse engineer the test condition.
2013-01-09 01:50:24 -05:00
Luis Ibanez d8fcd6cdb8 Following dm_start to mum_tstart. 2013-01-09 01:37:39 -05:00
Luis Ibanez 96df9b4710 Started implementing dm_start.c 2013-01-09 01:29:22 -05:00
Luis Ibanez 464e969389 Added two missing ARM assembly stubs. 2012-12-25 18:42:00 -05:00
Luis Ibanez 8ae5a3bf1a Added more ARM assembly stubs. 2012-12-25 16:49:12 -05:00
Luis Ibanez ef6a3005da Adding more ARM assembly stubs. 2012-12-25 16:37:09 -05:00
Luis Ibanez 394dc3222c Adding more ARM assembly stubs. 2012-12-25 16:17:51 -05:00
Luis Ibanez 9f9c04d609 Adding more ARM assembly stubs. 2012-12-25 16:05:18 -05:00
Luis Ibanez 852e9c22b1 Adding more ARM assembly stubs for op_ routines. 2012-12-25 15:48:51 -05:00
Luis Ibanez e6b3ddf829 Adding more ARM assembly stubs. 2012-12-25 15:17:35 -05:00
Luis Ibanez 4166b832c5 Added more ARM assembly stubs. 2012-12-25 15:08:23 -05:00
Luis Ibanez 5f2ef86c7a Added stubs for more ARM assembly files. 2012-12-25 14:49:00 -05:00
Luis Ibanez 78903f8fec Added skeleton to implement compswap.
The compswap function is implemented in native assembly.
Here we make the first steps to implement the function using the
ARM assembly.
2012-12-24 19:33:47 -05:00
Luis Ibanez cccb2c7535 Added case for __arm__ copying from i386.
The code was simply copy pasted at this point.
It needs to be reviewed and fixed in order to match the
actual required behavior in the ARM architecture.
2012-12-24 18:23:36 -05:00
Luis Ibanez ffbcca706c Added __arm__ as supported non-shared binary.
Just as we did in sr_unix/gtm_trigger.c
2012-12-24 17:40:18 -05:00
Luis Ibanez c542303eda Got ARM equivalent of the EIP register.
The Extended Instruction Pointer EIP, seems to be the equivalent
of the Program Counter PC register in the ARM architecture:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0274b/index.html

The list of ARM registers can be seen in the structure sigcontext
in the file:  /usr/include/arm-linux-gnueabihf/asm/sigcontext.h
2012-12-24 16:58:16 -05:00
Luis Ibanez 899ab884ca Logic for #defined __arm__ was incorrect.
It should have been paired with the __i386__ flag.
2012-12-24 16:18:03 -05:00
Luis Ibanez b4d54aa67d Adding ARM to list of non-shared binary platforms
By default only the i386 platform is supported for non-shared binaries.
Here we add ARM to the list. Which means that we will have to port to
ARM the implementation of the i386 architecture.
2012-12-24 16:06:43 -05:00
Luis Ibanez 9c1ea6e8c8 Added case for __arm__
The symbol defined by gcc is "__arm__", not "__arm".

This can be seen with the command:  cpp -dM < /dev/null
2012-12-24 15:57:43 -05:00
Luis Ibanez 94d996f81e Adding option for __arm.
Remains to be seen if the values inside are appropriate for ARM...
2012-12-24 15:40:12 -05:00
Luis Ibanez de89d5ae3f Adding .h files from sr_i386. 2012-12-24 15:33:04 -05:00
Luis Ibanez 6c3ea0fea2 Added a branch directory for ARM code. 2012-12-24 15:28:00 -05:00
Luis Ibanez 831df3bc61 Adding ARM to the list of platforms.
This is only the beggining...
2012-12-24 15:18:32 -05:00
Amul Shah 0eede9a40b Synchronize with upstream GT.M V6.0-000
Please refer to the release notes for more information about this
version.
http://tinco.pair.com/bhaskar/gtm/doc/articles/GTM_V6.0-000_Release_Notes.html

This commit includes all files from the x86 and x86_64 source tarballs,
including generated files.
2012-10-29 18:54:31 -04:00
853 changed files with 28171 additions and 9404 deletions

View File

@ -15,13 +15,21 @@
cmake_minimum_required(VERSION 2.8.5)
project(GTM C ASM)
set(version V5.5-000)
set(version V6.0-000)
if("${version}" EQUAL "")
set(version V9.9-0)
endif()
if("${CMAKE_SIZEOF_VOID_P}" EQUAL 4)
set(arch "x86")
else()
set(arch "x86_64")
endif()
option(BUILD_FOR_ARM "Build for the ARM Architecture" OFF)
if(BUILD_FOR_ARM)
set(arch "arm")
endif()
# Choose where to get bootstrap sources.
set(GTM_DIST "" CACHE PATH "Existing GT.M Distribution")
if(GTM_DIST)
@ -93,7 +101,11 @@ set(gen_xfer_desc 0)
if("${CMAKE_SYSTEM_NAME}" MATCHES "Linux")
list(APPEND gt_src_list sr_linux)
if("${CMAKE_SIZEOF_VOID_P}" EQUAL 4)
list(APPEND gt_src_list sr_i386 sr_x86_regs sr_unix_nsb)
if(BUILD_FOR_ARM)
list(APPEND gt_src_list sr_arm sr_x86_regs sr_unix_nsb)
else()
list(APPEND gt_src_list sr_i386 sr_x86_regs sr_unix_nsb)
endif()
else()
list(APPEND gt_src_list sr_x86_64 sr_x86_regs)
set(gen_xfer_desc 1)
@ -240,14 +252,14 @@ foreach(m chk2lev.m chkop.m gendash.m genout.m loadop.m loadvx.m msg.m tttgen.m
)
endforeach()
set(mumps_ttt_args -run tttgen
${GTM_SOURCE_DIR}/sr_unix/ttt.txt
${GTM_SOURCE_DIR}/sr_port/opcode_def.h
${GTM_SOURCE_DIR}/sr_port/vxi.h
)
foreach(f ttt.txt opcode_def.h vxi.h)
select_file(src ${f})
list(APPEND tttfiles ${src})
endforeach()
set(mumps_ttt_args -run tttgen ${tttfiles})
add_custom_command(
OUTPUT gen/ttt.c
DEPENDS ${GTM_SOURCE_DIR}/sr_unix/ttt.txt
DEPENDS ${tttfiles}
gen/chk2lev.m gen/chkop.m gen/gendash.m gen/genout.m gen/loadop.m
gen/loadvx.m gen/tttgen.m gen/tttscan.m
${GTM_SOURCE_DIR}/sr_unix/mumps.cmake ${gen_bootstrap_depend}
@ -736,6 +748,6 @@ install(FILES sr_unix/lowerc_cp.sh DESTINATION ${GTM_INSTALL_DIR}
)
install(FILES COPYING DESTINATION ${GTM_INSTALL_DIR})
install(FILES sr_port/README.txt DESTINATION ${GTM_INSTALL_DIR})
add_custom_target(place_files ALL DEPENDS ${files_to_place})

0
COPYING Executable file → Normal file
View File

136
README Executable file → Normal file
View File

@ -5,111 +5,67 @@ file included in this package, it contains the terms of the license under
which the package is provided to you. If there is not a COPYING file in
the package, you must ensure that your use of FIS GT.M complies with the
license under which it is provided. If you are unsure as to the terms of
your license, please consult with the entity that provided you with the package.
your license, please consult with the entity that provided you with the
package.
The make file enclosed (sr_unix/comlist.mk) will build GT.M from source.
The prerequisites are GNU make, GT.M binary installation (which you can
download from http://sourceforge.net/projects/fis-gtm/), Linux x86, tcsh,
Unicode and GPG include files. Unicode include files are automatically
installed if ICU is installed. GPG include files require installing the
GNUPG and related library development packages. GNU make 3.81,
Ubuntu 10.04 LTS and RHEL 5.0 were used to do the test builds for this
distribution. The default ICU and GPG packages were taken from the OS
vendors' repositories.
GT.M relies on CMake to generate the Makefiles to build GT.M from source. The
prerequisites are CMake (at least 2.8.5), GNU make (at least 3.81), Linux
(either x86 or x86_64), Unicode include files and GPG. Unicode include files
are automatically installed if ICU is installed. GPG include files require
installing the GNUPG and related library development packages. Debian 6, Ubuntu
12.04 LTS and RHEL 6.0 were used to do the test builds for this distribution.
The default ICU and GPG packages were taken from the distribution repositories.
To build a production version GT.M for linux do the following steps:
1. Fulfill the pre-requisites.
Download and install GT.M binary distribution from SourceForge if you
do not have GT.M installed already. The build procedure needs an
existing GT.M mumps installed on the machine.
To build GT.M for Linux, do the following steps:
You can download GT.M from http://sourceforge.net/projects/fis-gtm/
Unpack the tar file and run the configure script as root. Note: the tar
file unpacks everything into your current working directory, not a new
subdirectory. The Linux Standard Base (LSB) install path for GT.M
V54002 is /opt/lsb-gtm/V5.4-002_i686 or /opt/lsb-gtm/V5.4-002_x8664.
$ tar xfz gtm_V54002_linux_i686_src.tar.gz
1. Fulfill the pre-requisites
Install developement libraries libelf, zlib, libicu, libgpgme, libgpg-error,
libgcrypt.
[optional] The GT.M source tarball includes pre-generated files. To generate
these files requires a binary distribution of GT.M. You can download GT.M
from http://sourceforge.net/projects/fis-gtm/ Unpack the tar file and run
the configure script as root. Note: the tar file unpacks everything into
your current working directory, not a new subdirectory. The Linux Standard
Base (LSB) install path for GT.M V60000 is /opt/lsb-gtm/V6.0-000_i686 or
/opt/lsb-gtm/V6.0-000_x8664.
$ tar xfz gtm_V60000_linux_i686_pro.tar.gz
$ sudo sh ./configure
# Provide the directory path to cmake using
# -D GTM_DIST:PATH=$gtm_dist
2. Unpack the GT.M sources
Change directory in the directory that you will place the GT.M source,
here after referred to as <gtm-directory>.
$ mkdir <gtm-directory>
$ cd <gtm-directory>
$ tar xfz gtm_V54002_linux_i686_src.tar.gz
$ tar xfz gtm_V60000_linux_i686_src.tar.gz
You should find this README, COPYING file and sr_* source directroies.
You should find this README, COPYING and CMakeLitst.txt file and sr_* source
directories.
3. Define environment variables needed to build GT.M
You will need to use tcsh to build GT.M. GT.M uses several csh script
files the define environment variables used in the build process. You
will need to define several variables prior to intiating your GT.M build.
3. Building GT.M -
<gtm-builddir> can be a sub directory of the source directory <gtm-directory>
- Define 'gtm_curpro' and 'gtm_exe' so that you can compile M programs.
This is the directory in which you installed the GT.M binaries from
SourceForge.
$ setenv gtm_curpro <path to installed GT.M>
$ setenv gtm_exe $gtm_curpro
$ setenv HOSTOS `uname -s`
$ mkdir <gtm-builddir>
$ cd <gtm-builddir>
$ cmake <gtm-directory>
- Define 'gtm_tools' and 'gtm_inc'
$ setenv gtm_tools $PWD/sr_linux
$ setenv gtm_inc $PWD/sr_linux
- [OPTIONAL] Ubuntu users must define 'distro'
$ setenv distro ubuntu
# By default the build produces release versions of GT.M. To build a debug
# version of GT.M supply the following parameter to cmake
# -D CMAKE_BUILD_TYPE=DEBUG
#
# Note that the default install location is driven by CMAKE_INSTALL_PREFIX.
# You can change this when executing cmake
# -D CMAKE_INSTALL_PREFIX:PATH=/opt/lsb-gtm
#
$ make
- [OPTIONAL] By default the build procedure will build 64 bit version of
GT.M on a x86_64 bit machine.
If you intend to build 32 bit version of GT.M on a x86_64 bit machine you
have to explicitly set the environment variable 'OBJECT_MODE' to '32'
$ setenv OBJECT_MODE 32
$ make install
- Specify which ICU version is installed.
ICU version needs to be of the form #.# If the result of running
"icu-config --version" has the form #.#.#, just use the first two
parts. For example, if "icu-config --version" returns 3.8.1, use
3.8 in the "setenv" step.
$ icu-config --version
$ setenv gtm_icu_version <result of previous step>
- Define 'gtm_version_change' and execute gtm_env.csh
$ setenv gtm_version_change 1
$ source sr_unix/gtm_env.csh
4. Building GT.M -
By default, the gmake will build a production version GT.M. The build type
of GT.M can be controlled by a parameter "buildtypes" - dbg (debug),
bta (beta), and pro (production). Passing a subset of dbg, bta, or pro in
"buildtypes" from the environment or the command line will build that subset.
For example:
gmake -f sr_unix/comlist.mk -I./sr_unix -I./sr_linux buildtypes=dbg gtm_ver=$PWD
will build just a debuggable GT.M release.
You can clean your builds by appending 'clean' to the make line.
For example:
gmake -f sr_unix/comlist.mk -I./sr_unix -I./sr_linux buildtypes=dbg gtm_ver=$PWD clean
5. Packaging GT.M -
Once the required builds have been done the object distribution can be
tar'ed by doing:
gmake -f sr_unix/comlist.mk -I./sr_unix -I./sr_linux gtm_ver=$PWD package
Again, buildtypes can be used to package just a subset. For example:
gmake -f sr_unix/comlist.mk -I./sr_unix -I./sr_linux buildtypes=pro gtm_ver=$PWD package
Appendix: Known warnings and errors
- "cc1: note: obsolete option -I- used, please use -iquote instead"
You can safely ignore this warning
- "chk2lev.mdep:2: *** missing separator. Stop."
tcsh is using the builtin echo, you need to set the environment variable
'distro' to 'ubuntu' and clean your build.
$ setenv distro ubuntu
$ make clean
4. Packaging GT.M -
Create a tar file from the installed directory

32
sr_arm/aswp.s Normal file
View File

@ -0,0 +1,32 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global aswp
.type aswp, %function
aswp:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size aswp, .-aswp

91
sr_arm/auto_zlink.c Normal file
View File

@ -0,0 +1,91 @@
/****************************************************************
* *
* Copyright 2001, 2012 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "gtm_string.h"
#include "i386.h"
#include "urx.h"
#include <rtnhdr.h>
#include "op.h"
#include <auto_zlink.h>
#define PEA_SZ 5
#define XFER_BYTE_SZ 3
#define XFER_LONG_SZ 6
#define INST_SZ 1
error_def(ERR_LABELUNKNOWN);
error_def(ERR_ROUTINEUNKNOWN);
rhdtyp *auto_zlink (unsigned char *pc, int4 **line)
{
char *adj_pc; /* address of PEA rtnref offset */
mstr rname;
mident_fixed rname_local;
urx_rtnref *rtnurx;
mval rtn;
rhdtyp *rhead;
union
{
ModR_M modrm;
unsigned char byte;
} modrm_byte_byte, modrm_byte_long;
/* ASSUMPTION -- The instruction previous to the current mpc is a transfer table jump.
* This is either a byte or a int4 displacement off of ebx, instruction
* size either 3 or 6 (prefix byte, ModR/M byte, 8- or 32-bit offset).
*/
modrm_byte_byte.modrm.reg_opcode = I386_INS_CALL_Ev;
modrm_byte_byte.modrm.mod = I386_MOD32_BASE_DISP_8;
modrm_byte_byte.modrm.r_m = I386_REG_EBX;
modrm_byte_long.modrm.reg_opcode = I386_INS_CALL_Ev;
modrm_byte_long.modrm.mod = I386_MOD32_BASE_DISP_32;
modrm_byte_long.modrm.r_m = I386_REG_EBX;
if ((*(pc - XFER_BYTE_SZ) == I386_INS_Grp5_Prefix) && (*(pc - XFER_BYTE_SZ + 1) == modrm_byte_byte.byte))
{
assert(*(pc - XFER_BYTE_SZ - PEA_SZ) == I386_INS_PUSH_Iv);
adj_pc = (char *)pc - XFER_BYTE_SZ - PEA_SZ;
} else if ((*(pc - XFER_LONG_SZ) == I386_INS_Grp5_Prefix) && (*(pc - XFER_LONG_SZ + 1) == modrm_byte_long.byte))
{
assert(*(pc - XFER_LONG_SZ - PEA_SZ) == I386_INS_PUSH_Iv);
adj_pc = (char *)pc - XFER_LONG_SZ - PEA_SZ;
} else
GTMASSERT;
if (azl_geturxrtn(adj_pc + INST_SZ, &rname, &rtnurx))
{
assert((0 <= rname.len) && (MAX_MIDENT_LEN >= rname.len));
assert(rname.addr);
/* Copy rname into local storage because azl_geturxrtn sets rname.addr to an address that is
* freed during op_zlink and before the call to find_rtn_hdr.
*/
memcpy(rname_local.c, rname.addr, rname.len);
rname.addr = rname_local.c;
assert(rtnurx);
assert(*(adj_pc - PEA_SZ) == I386_INS_PUSH_Iv);
assert(azl_geturxlab(adj_pc - PEA_SZ + INST_SZ, rtnurx));
assert(!find_rtn_hdr(&rname));
rtn.mvtype = MV_STR;
rtn.str.len = rname.len;
rtn.str.addr = rname.addr;
op_zlink (&rtn, 0);
if (0 != (rhead = find_rtn_hdr(&rname))) /* note the assignment */
{
*line = *(int4 **)(adj_pc - PEA_SZ + INST_SZ);
if (!(*line))
rts_error(VARLSTCNT(1) ERR_LABELUNKNOWN);
return rhead;
}
}
rts_error(VARLSTCNT(1) ERR_ROUTINEUNKNOWN);
return NULL;
}

17
sr_arm/auto_zlink.h Normal file
View File

@ -0,0 +1,17 @@
/****************************************************************
* *
* Copyright 2001, 2010 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#ifndef __AUTO_ZLINK_H__
#define __AUTO_ZLINK_H__
rhdtyp *auto_zlink (unsigned char *pc, int4 **line);
#endif

27
sr_arm/call_dm.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global call_dm
.type call_dm, %function
call_dm:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size call_dm, .-call_dm

27
sr_arm/ci_restart.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global ci_restart
.type ci_restart, %function
ci_restart:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size ci_restart, .-ci_restart

39
sr_arm/compswap.s Normal file
View File

@ -0,0 +1,39 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global compswap
.type compswap, %function
compswap:
@ args = 4, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
str r3, [fp, #-28]
ldr r3, [fp, #-20]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
add r3, r3, #17
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size compswap, .-compswap

View File

@ -1,6 +1,6 @@
/****************************************************************
* *
* Copyright 2001 Sanchez Computer Associates, Inc. *
* Copyright 2001, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
@ -9,9 +9,8 @@
* *
****************************************************************/
#ifndef __CRIT_WAKE_ALARM_H__
#define __CRIT_WAKE_ALARM_H__
void crit_wake_alarm(void);
#endif
int dm_start(void)
{
mum_tstart();
return 0;
}

57
sr_arm/dm_start.s Normal file
View File

@ -0,0 +1,57 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global dm_start_arm
.type dm_start_arm, %function
dm_start_arm:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size dm_start_arm, .-dm_start_arm
.align 2
.global gtm_levl_ret_code
.type gtm_levl_ret_code, %function
gtm_levl_ret_code:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size gtm_levl_ret_code, .-gtm_levl_ret_code
.align 2
.global gtm_ret_code
.type gtm_ret_code, %function
gtm_ret_code:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size gtm_ret_code, .-gtm_ret_code

1315
sr_arm/emit_code.c Normal file

File diff suppressed because it is too large Load Diff

20
sr_arm/emit_code.h Normal file
View File

@ -0,0 +1,20 @@
/****************************************************************
* *
* Copyright 2001 Sanchez Computer Associates, Inc. *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#ifndef EMIT_CODE_INCLUDED
#define EMIT_CODE_INCLUDED
void trip_gen(triple *ct);
short *emit_vax_inst(short *inst, oprtype **fst_opr, oprtype **lst_opr);
void emit_xfer(short xfer);
void emit_base_offset (short reg_opcode, short base_reg, int4 offset);
#endif

85
sr_arm/find_line_call.c Normal file
View File

@ -0,0 +1,85 @@
/****************************************************************
* *
* Copyright 2001, 2012 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "xfer_enum.h"
#include "i386.h"
#include <rtnhdr.h> /* Needed by zbreak.h */
#include "zbreak.h"
zb_code *find_line_call(void *addr)
{
unsigned char *call_addr;
union
{
ModR_M modrm;
unsigned char byte;
} modrm_byte;
call_addr = (unsigned char *)addr;
modrm_byte.byte = *(call_addr + 1);
if ((I386_INS_Grp5_Prefix == *call_addr) && (I386_INS_CALL_Ev == modrm_byte.modrm.reg_opcode))
{
call_addr++;
assert(I386_REG_EBX == modrm_byte.modrm.r_m);
call_addr++;
if (I386_MOD32_BASE_DISP_8 == modrm_byte.modrm.mod)
{
if ((xf_linestart * SIZEOF(int4) == *call_addr) ||
(xf_zbstart * SIZEOF(int4) == *call_addr))
return (zb_code *)call_addr;
call_addr++;
} else
{
assert (I386_MOD32_BASE_DISP_32 == modrm_byte.modrm.mod);
return (zb_code *)addr;
}
}
modrm_byte.byte = *(call_addr + 1);
if ((I386_INS_PUSH_Ib == *call_addr) || (I386_INS_PUSH_Iv == *call_addr))
{
while ((I386_INS_PUSH_Ib == *call_addr) || (I386_INS_PUSH_Iv == *call_addr))
{
if (I386_INS_PUSH_Ib == *call_addr)
call_addr += 1 + SIZEOF(unsigned char);
else
{
assert(I386_INS_PUSH_Iv == *call_addr);
call_addr += 1 + SIZEOF(int4);
}
}
modrm_byte.byte = *(call_addr + 1);
if ((I386_INS_Grp5_Prefix != *call_addr++) || (I386_INS_CALL_Ev != modrm_byte.modrm.reg_opcode))
return (zb_code *)addr;
assert((I386_MOD32_BASE_DISP_8 == modrm_byte.modrm.mod) || (I386_MOD32_BASE_DISP_32 == modrm_byte.modrm.mod));
assert(I386_REG_EBX == modrm_byte.modrm.r_m);
call_addr++;
if (I386_MOD32_BASE_DISP_8 == modrm_byte.modrm.mod)
{
if ((xf_linefetch * SIZEOF(int4) != *call_addr) && (xf_zbfetch * SIZEOF(int4) != *call_addr))
return (zb_code *)addr;
}
}
else if ((I386_INS_Grp5_Prefix == *call_addr) && (I386_INS_CALL_Ev != modrm_byte.modrm.reg_opcode))
{
call_addr++;
assert((I386_MOD32_BASE_DISP_8 == modrm_byte.modrm.mod) || (I386_MOD32_BASE_DISP_32 == modrm_byte.modrm.mod));
assert(I386_REG_EBX == modrm_byte.modrm.r_m);
call_addr++;
if (I386_MOD32_BASE_DISP_8 == modrm_byte.modrm.mod)
{
if ((xf_linestart * SIZEOF(int4) != *call_addr) && (xf_zbstart * SIZEOF(int4) != *call_addr))
return (zb_code *)addr;
}
}
return (zb_code *)call_addr;
}

31
sr_arm/follow.s Normal file
View File

@ -0,0 +1,31 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global follow
.type follow, %function
follow:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size follow, .-follow

View File

@ -70,6 +70,7 @@ LITDEF err_msg gdeerrors[] = {
"NONASCII", "!AD is illegal for a !AD as it contains non-ASCII characters", 4,
"CRYPTNOMM", "!AD is an encrypted database. Cannot support MM access method.", 2,
"JNLALLOCGROW", "Increased Journal ALLOCATION from [!AD blocks] to [!AD blocks] to match AUTOSWITCHLIMIT for !AD !AD", 8,
"KEYFORBLK", "But block size !AD can only support key size !AD", 4,
};
LITDEF int GDE_BLKSIZ512 = 150503435;
@ -129,9 +130,10 @@ LITDEF int GDE_WRITEERROR = 150503859;
LITDEF int GDE_NONASCII = 150503866;
LITDEF int GDE_CRYPTNOMM = 150503874;
LITDEF int GDE_JNLALLOCGROW = 150503883;
LITDEF int GDE_KEYFORBLK = 150503891;
GBLDEF err_ctl gdeerrors_ctl = {
248,
"GDE",
&gdeerrors[0],
57};
58};

428
sr_arm/incr_link.c Normal file
View File

@ -0,0 +1,428 @@
/****************************************************************
* *
* Copyright 2001, 2012 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "gtm_unistd.h"
#include "gtm_stdio.h"
#include "gtm_string.h"
#include <errno.h>
#include <rtnhdr.h>
#include "compiler.h"
#include "urx.h"
#include "objlabel.h" /* needed for masscomp.h */
#include "masscomp.h"
#include "gtmio.h"
#include "incr_link.h"
#include "min_max.h" /* MIDENT_CMP needs MIN */
#include "cmd_qlf.h" /* needed for CQ_UTF8 */
#include "gtm_text_alloc.h"
/* INCR_LINK - read and process a mumps object module. Link said module to currently executing image */
LITREF char gtm_release_name[];
LITREF int4 gtm_release_name_len;
static char *code;
GBLREF mident_fixed zlink_mname;
GBLREF boolean_t gtm_utf8_mode;
error_def(ERR_INVOBJ);
error_def(ERR_LOADRUNNING);
error_def(ERR_TEXT);
#define RELREAD 50 /* number of relocation entries to buffer */
typedef struct res_list_struct
{
struct res_list_struct *next, *list;
unsigned int addr, symnum;
} res_list;
void res_free(res_list *root);
bool addr_fix(int file, struct exec *fhead, urx_rtnref *urx_lcl, rhdtyp *code);
void zl_error(int4 file, int4 err, int4 err2, int4 len, char *addr);
bool incr_link(int file_desc)
{
rhdtyp *hdr, *old_rhead;
int code_size, save_errno, cnt;
int4 rhd_diff, read_size;
char *literal_ptr;
var_tabent *curvar;
char module_name[SIZEOF(mident_fixed)];
lab_tabent *lbt_ent, *lbt_bot, *lbt_top, *olbt_ent, *olbt_bot, *olbt_top, *curlab;
urx_rtnref urx_lcl_anchor;
int order;
struct exec file_hdr;
urx_lcl_anchor.len = 0;
urx_lcl_anchor.addr = 0;
urx_lcl_anchor.lab = 0;
urx_lcl_anchor.next = 0;
code = NULL;
DOREADRL(file_desc, &file_hdr, SIZEOF(file_hdr), read_size);
if (read_size != SIZEOF(file_hdr))
{
if (-1 == read_size)
{
save_errno = errno;
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, strlen(STRERROR(save_errno)),
STRERROR(save_errno));
} else
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, RTS_ERROR_TEXT("reading file header"));
} else if (OMAGIC != file_hdr.a_magic)
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, RTS_ERROR_TEXT("bad magic"));
else if (OBJ_LABEL != file_hdr.a_stamp)
return FALSE; /* wrong version */
assert(0 == file_hdr.a_bss);
code_size = file_hdr.a_text + file_hdr.a_data;
code = GTM_TEXT_ALLOC(code_size);
DOREADRL(file_desc, code, code_size, read_size);
if (read_size != code_size)
{
if (-1 == read_size)
{
save_errno = errno;
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, strlen(STRERROR(save_errno)), STRERROR(save_errno)); /* BYPASSOK */
} else
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, RTS_ERROR_TEXT("reading code"));
}
hdr = (rhdtyp *)code;
if (memcmp(&hdr->jsb[0], "GTM_CODE", SIZEOF(hdr->jsb)))
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, RTS_ERROR_TEXT("missing GTM_CODE"));
if ((hdr->compiler_qlf & CQ_UTF8) && !gtm_utf8_mode)
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT,
RTS_ERROR_TEXT("Object compiled with CHSET=UTF-8 which is different from $ZCHSET"));
if (!(hdr->compiler_qlf & CQ_UTF8) && gtm_utf8_mode)
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT,
RTS_ERROR_TEXT("Object compiled with CHSET=M which is different from $ZCHSET"));
literal_ptr = code + file_hdr.a_text;
for (cnt = hdr->vartab_len, curvar = VARTAB_ADR(hdr); cnt; --cnt, ++curvar)
{ /* relocate the variable table */
assert(0 < curvar->var_name.len);
curvar->var_name.addr += (uint4)literal_ptr;
}
for (cnt = hdr->labtab_len, curlab = LABTAB_ADR(hdr); cnt; --cnt, ++curlab)
/* relocate the label table */
curlab->lab_name.addr += (uint4)literal_ptr;
if (!addr_fix(file_desc, &file_hdr, &urx_lcl_anchor, hdr))
{
urx_free(&urx_lcl_anchor);
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, RTS_ERROR_TEXT("address fixup failure"));
}
if (!zlput_rname(hdr))
{
urx_free(&urx_lcl_anchor);
/* Copy routine name to local variable because zl_error free's it. */
memcpy(&module_name[0], hdr->routine_name.addr, hdr->routine_name.len);
zl_error(file_desc, 0, ERR_LOADRUNNING, hdr->routine_name.len, &module_name[0]);
}
urx_add(&urx_lcl_anchor);
old_rhead = (rhdtyp *)hdr->old_rhead_ptr;
lbt_bot = (lab_tabent *)((char *)hdr + hdr->labtab_ptr);
lbt_top = lbt_bot + hdr->labtab_len;
while (old_rhead)
{
lbt_ent = lbt_bot;
olbt_bot = (lab_tabent *)((char *)old_rhead + old_rhead->labtab_ptr);
olbt_top = olbt_bot + old_rhead->labtab_len;
for (olbt_ent = olbt_bot; olbt_ent < olbt_top; olbt_ent++)
{
for (; lbt_ent < lbt_top; lbt_ent++)
{
MIDENT_CMP(&olbt_ent->lab_name, &lbt_ent->lab_name, order);
if (order <= 0)
break;
}
if ((lbt_ent < lbt_top) && !order)
{
olbt_ent->lab_ln_ptr = lbt_ent->lab_ln_ptr;
olbt_ent->has_parms = lbt_ent->has_parms;
} else
olbt_ent->lab_ln_ptr = 0;
}
rhd_diff = (char *)hdr - (char *)old_rhead;
old_rhead->src_full_name = hdr->src_full_name;
old_rhead->routine_name = hdr->routine_name;
old_rhead->vartab_len = hdr->vartab_len;
old_rhead->vartab_ptr = hdr->vartab_ptr + rhd_diff;
old_rhead->ptext_ptr = hdr->ptext_ptr + rhd_diff;
old_rhead->current_rhead_ptr = rhd_diff;
old_rhead->temp_mvals = hdr->temp_mvals;
old_rhead->temp_size = hdr->temp_size;
old_rhead = (rhdtyp *) old_rhead->old_rhead_ptr;
}
urx_resolve(hdr, lbt_bot, lbt_top);
return TRUE;
}
bool addr_fix(int file, struct exec *fhead, urx_rtnref *urx_lcl, rhdtyp *code)
{
res_list *res_root, *new_res, *res_temp, *res_temp1;
char *symbols, *sym_temp, *sym_temp1, *symtop, *res_addr;
struct relocation_info rel[RELREAD];
int numrel, rel_read, i, string_size, sym_size;
size_t status;
mident_fixed rtnid, labid;
mstr rtn_str;
rhdtyp *rtn;
lab_tabent *label, *labtop;
bool labsym;
urx_rtnref *urx_rp;
urx_addr *urx_tmpaddr;
res_root = 0;
numrel = (fhead->a_trsize + fhead->a_drsize) / SIZEOF(struct relocation_info);
if (numrel * SIZEOF(struct relocation_info) != fhead->a_trsize + fhead->a_drsize)
return FALSE;
for ( ; numrel;)
{
rel_read = numrel < RELREAD ? numrel : RELREAD;
DOREADRC(file, rel, rel_read * SIZEOF(struct relocation_info), status);
if (0 != status)
{
res_free(res_root);
return FALSE;
}
numrel -= rel_read;
for (i = 0; i < rel_read; i++)
{
if (rel[i].r_extern)
{
new_res = (res_list *)malloc(SIZEOF(*new_res));
new_res->symnum = rel[i].r_symbolnum;
new_res->addr = rel[i].r_address;
new_res->next = new_res->list = 0;
/* Insert the relocation entry in symbol number order on the unresolved chain */
if (!res_root)
res_root = new_res;
else
{ res_temp = res_root;
res_temp1 = 0;
while (res_temp)
{
if (res_temp->symnum >= new_res->symnum)
break;
res_temp1 = res_temp;
res_temp = res_temp->next;
}
if (res_temp)
{ if (res_temp->symnum == new_res->symnum)
{
new_res->list = res_temp->list;
res_temp->list = new_res;
} else
{ if (res_temp1)
{
new_res->next = res_temp1->next;
res_temp1->next = new_res;
} else
{
assert(res_temp == res_root);
new_res->next = res_root;
res_root = new_res;
}
}
} else
res_temp1->next = new_res;
}
} else
*(unsigned int *)(((char *)code) + rel[i].r_address) += (unsigned int)code;
}
}
/* All relocations within the routine should have been done, so copy the routine_name */
assert(code->routine_name.len < SIZEOF(zlink_mname.c));
memcpy(&zlink_mname.c[0], code->routine_name.addr, code->routine_name.len);
zlink_mname.c[code->routine_name.len] = 0;
if (!res_root)
return TRUE;
if ((off_t)-1 == lseek(file, (off_t)fhead->a_syms, SEEK_CUR))
{ res_free(res_root);
return FALSE;
}
DOREADRC(file, &string_size, SIZEOF(string_size), status);
if (0 != status)
{
res_free(res_root);
return FALSE;
}
string_size -= SIZEOF(string_size);
symbols = malloc(string_size);
DOREADRC(file, symbols, string_size, status);
if (0 != status)
{
free(symbols);
res_free(res_root);
return FALSE;
}
/* Match up unresolved entries with the null terminated symbol name entries from the
* symbol text pool we just read in.
*/
sym_temp = sym_temp1 = symbols;
symtop = symbols + string_size;
for (i = 0; res_root; i++)
{
while (i < res_root->symnum)
{ /* Forward symbol space until our symnum index (i) matches the symbol we are processing in res_root */
while (*sym_temp)
{
if (sym_temp >= symtop)
{
free(symbols);
res_free(res_root);
return FALSE;
}
sym_temp++;
}
sym_temp++;
sym_temp1 = sym_temp;
i++;
}
assert (i == res_root->symnum);
/* Find end of routine name that we care about */
while (('.' != *sym_temp1) && *sym_temp1)
{ if (sym_temp1 >= symtop)
{
free(symbols);
res_free(res_root);
return FALSE;
}
sym_temp1++;
}
sym_size = sym_temp1 - sym_temp;
assert(sym_size <= MAX_MIDENT_LEN);
memcpy(&rtnid.c[0], sym_temp, sym_size);
rtnid.c[sym_size] = 0;
if ('_' == rtnid.c[0])
rtnid.c[0] = '%';
assert((sym_size != mid_len(&zlink_mname)) || (0 != memcmp(&zlink_mname.c[0], &rtnid.c[0], sym_size)));
rtn_str.addr = &rtnid.c[0];
rtn_str.len = sym_size;
rtn = find_rtn_hdr(&rtn_str); /* Routine already resolved? */
sym_size = 0;
labsym = FALSE;
if (*sym_temp1 == '.')
{ /* If symbol is for a label, find the end of the label name */
sym_temp1++;
sym_temp = sym_temp1;
while (*sym_temp1)
{
if (sym_temp1 >= symtop)
{
free(symbols);
res_free(res_root);
return FALSE;
}
sym_temp1++;
}
sym_size = sym_temp1 - sym_temp;
assert(sym_size <= MAX_MIDENT_LEN);
memcpy(&labid.c[0], sym_temp, sym_size);
labid.c[sym_size] = 0;
if ('_' == labid.c[0])
labid.c[0] = '%';
labsym = TRUE;
}
sym_temp1++;
sym_temp = sym_temp1;
if (rtn)
{ /* The routine part at least is known */
if (labsym)
{ /* Look our target label up in the routines label table */
label = (lab_tabent *)((char *)rtn + rtn->labtab_ptr);
labtop = label + rtn->labtab_len;
for (; label < labtop && ((sym_size != label->lab_name.len)
|| memcmp(&labid.c[0], label->lab_name.addr, sym_size)); label++)
;
if (label < labtop)
res_addr = (char *)&label->LABENT_LNR_OFFSET;
else
res_addr = 0;
} else
res_addr = (char *)rtn;
if (res_addr)
{ /* The external symbol definition is available. Resolve all references to it */
res_temp = res_root->next;
while (res_root)
{
*(uint4 *)(((char *)code) + res_root->addr) = (unsigned int)res_addr;
res_temp1 = res_root->list;
free(res_root);
res_root = res_temp1;
}
res_root = res_temp;
continue;
}
}
/* This symbol is unknown. Put on the (local) unresolved extern chain -- either for labels or routines */
urx_rp = urx_putrtn(rtn_str.addr, rtn_str.len, urx_lcl);
res_temp = res_root->next;
while (res_root)
{
if (labsym)
urx_putlab(&labid.c[0], sym_size, urx_rp, ((char *)code) + res_root->addr);
else
{ urx_tmpaddr = (urx_addr *)malloc(SIZEOF(urx_addr));
urx_tmpaddr->next = urx_rp->addr;
urx_tmpaddr->addr = (INTPTR_T *)(((char *)code) + res_root->addr);
urx_rp->addr = urx_tmpaddr;
}
res_temp1 = res_root->list;
free(res_root);
res_root = res_temp1;
}
res_root = res_temp;
}
free(symbols);
return TRUE;
}
void res_free(res_list *root)
{
res_list *temp;
while (root)
{ while (root->list)
{ temp = root->list->list;
free(root->list);
root->list = temp;
}
temp = root->next;
free(root);
root = temp;
}
}
/* ZL_ERROR - perform cleanup and signal errors found in zlinking a mumps object module
* err - an error code that accepts no arguments and
* err2 - an error code that accepts two arguments (!AD)
*/
void zl_error(int4 file, int4 err, int4 err2, int4 len, char *addr)
{
int rc;
if (code)
{
GTM_TEXT_FREE(code);
code = NULL;
}
CLOSEFILE_RESET(file, rc); /* resets "file" to FD_INVALID */
if ((0 != err) && (0 != err2))
rts_error(VARLSTCNT(6) err, 0, err2, 2, len, addr);
else if (0 != err)
rts_error(VARLSTCNT(1) err);
else
{
assert(0 != err2);
rts_error(VARLSTCNT(4) err2, 2, len, addr);
}
}

81
sr_arm/make_cimode.c Normal file
View File

@ -0,0 +1,81 @@
/****************************************************************
* *
* Copyright 2001, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "gtm_string.h"
#include "error.h"
#include <rtnhdr.h>
#include "op.h"
#include "i386.h"
#include "inst_flush.h"
#include "gtmci.h"
#include "gtm_text_alloc.h"
#define CALL_SIZE 5
#define CODE_SIZE (3 * CALL_SIZE)
#define CODE_LINES 3
/* The code created and returned by make_cimode() is executed in the frame GTM$CI at level 1 of
* every nested call-in environment. For every M routine being called-in from C, GTM$CI code
* will setup argument registers/stack and executes the M routine. When the M routine returns
* from its final QUIT, GTM$CI returns to gtm_ci(). make_cimode generates machine equivalents
* for the following operations in that order:
*
* CALL ci_restart :setup register/stack arguments from 'param_list' and transfer control
* to op_extcall/op_extexfun which return only after the M routine finishes and QUITs.
* CALL ci_ret_code :transfer control from the M routine back to C (gtm_ci). Never returns.
* CALL opp_ret :an implicit QUIT although it is never executed.
*
* Before GTM$CI executes, it is assumed that the global 'param_list' has been populated with
* argument/return mval*.
*/
rhdtyp *make_cimode(void)
{
static rhdtyp *base_address = NULL;
lab_tabent *lbl;
int *lnr;
unsigned char *code;
if (NULL != base_address)
return base_address;
base_address = (rhdtyp *)GTM_TEXT_ALLOC(SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent) + CODE_LINES * SIZEOF(int4));
memset(base_address,0,SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent) + CODE_LINES * SIZEOF(int4));
base_address->routine_name.len = STR_LIT_LEN(GTM_CIMOD);
base_address->routine_name.addr = GTM_CIMOD;
base_address->ptext_ptr = SIZEOF(rhdtyp);
base_address->vartab_ptr =
base_address->labtab_ptr = SIZEOF(rhdtyp) + CODE_SIZE; /* hdr + code */
base_address->lnrtab_ptr = SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent);
base_address->labtab_len = 1;
base_address->lnrtab_len = CODE_LINES;
code = (unsigned char *) base_address + base_address->ptext_ptr;
*code++ = I386_INS_CALL_Jv;
*((int4 *)code) = (int4)((unsigned char *)ci_restart - (code + SIZEOF(int4)));
code += SIZEOF(int4);
*code++ = I386_INS_CALL_Jv; /* a CALL to return control from M to ci_ret_code() which in turn returns to gtm_ci() */
*((int4 *)code) = (int4)((unsigned char *)ci_ret_code - (code + SIZEOF(int4)));
code += SIZEOF(int4);
*code++ = I386_INS_JMP_Jv;
*((int4 *)code) = (int4)((unsigned char *)opp_ret - (code + SIZEOF(int4)));
code += SIZEOF(int4);
lbl = (lab_tabent *)((int) base_address + base_address->labtab_ptr);
lbl->lab_ln_ptr = base_address->lnrtab_ptr;
lnr = (int *)((int)base_address + base_address->lnrtab_ptr);
*lnr++ = base_address->ptext_ptr;
*lnr++ = base_address->ptext_ptr;
*lnr++ = base_address->ptext_ptr + 2 * CALL_SIZE;
assert(code - ((unsigned char *)base_address + base_address->ptext_ptr) == CODE_SIZE);
zlput_rname(base_address);
inst_flush(base_address, SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent) + CODE_LINES * SIZEOF(int4));
return base_address;
}

67
sr_arm/make_dmode.c Normal file
View File

@ -0,0 +1,67 @@
/****************************************************************
* *
* Copyright 2001, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "gtm_string.h"
#include "error.h"
#include <rtnhdr.h>
#include "op.h"
#include "i386.h"
#include "inst_flush.h"
#include "dm_setup.h"
#include "gtm_text_alloc.h"
#define CALL_SIZE 5
#define CODE_SIZE 3*CALL_SIZE
#define CODE_LINES 3
rhdtyp *make_dmode(void)
{
rhdtyp *base_address;
lab_tabent *lbl;
int *lnr;
unsigned char *code;
/* dummy code + label entry + line entries */
base_address = (rhdtyp *)GTM_TEXT_ALLOC(SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent) + CODE_LINES * SIZEOF(int4));
memset(base_address,0,SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent) + CODE_LINES*SIZEOF(int4));
base_address->routine_name.len = STR_LIT_LEN(GTM_DMOD);
base_address->routine_name.addr = GTM_DMOD;
base_address->ptext_ptr = SIZEOF(rhdtyp);
base_address->vartab_ptr =
base_address->labtab_ptr = SIZEOF(rhdtyp) + CODE_SIZE; /* hdr + code */
base_address->lnrtab_ptr = SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent);
base_address->labtab_len = 1;
base_address->lnrtab_len = CODE_LINES;
code = (unsigned char *) base_address + base_address->ptext_ptr;
*code++ = I386_INS_CALL_Jv;
*((int4 *)code) = (int4)((unsigned char *)dm_setup - (code + SIZEOF(int4)));
code += SIZEOF(int4);
*code++ = I386_INS_CALL_Jv; /* this should be a CALL to maintain uniformity between transfer to mum_tstart from baseframe
and transfers to mum_tstart from error processing (MUM_TSTART marco in
mdb_condition_handler) */
*((int4 *)code) = (int4)((unsigned char *)mum_tstart - (code + SIZEOF(int4)));
code += SIZEOF(int4);
*code++ = I386_INS_JMP_Jv;
*((int4 *)code) = (int4)((unsigned char *)opp_ret - (code + SIZEOF(int4)));
code += SIZEOF(int4);
lbl = (lab_tabent *)((int) base_address + base_address->labtab_ptr);
lbl->lab_ln_ptr = base_address->lnrtab_ptr;
lnr = (int *)((int)base_address + base_address->lnrtab_ptr);
*lnr++ = base_address->ptext_ptr;
*lnr++ = base_address->ptext_ptr;
*lnr++ = base_address->ptext_ptr + 2 * CALL_SIZE;
assert(code - ((unsigned char *)base_address + base_address->ptext_ptr) == CODE_SIZE);
zlput_rname(base_address);
inst_flush(base_address, SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent) + CODE_LINES * SIZEOF(int4));
return base_address;
}

77
sr_arm/masscomp.h Normal file
View File

@ -0,0 +1,77 @@
/****************************************************************
* *
* Copyright 2001 Sanchez Computer Associates, Inc. *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
struct exec {
short a_magic; /* magic number */
short a_stamp; /* version stamp - RTU 2.0+ uses this - see below */
uint4 a_text; /* size of text segment */
uint4 a_data; /* size of initialized data */
uint4 a_bss; /* size of uninitialized data */
uint4 a_syms; /* size of symbol table */
uint4 a_entry; /* entry point */
uint4 a_trsize; /* size of text relocation */
uint4 a_drsize; /* size of data relocation */
};
/*
* Format of a relocation datum.
*/
struct relocation_info {
int r_address; /* address which is relocated */
unsigned int r_symbolnum:24, /* local symbol ordinal */
r_pcrel:1, /* was relocated pc relative already */
r_length:2, /* 0=byte, 1=word, 2=int4 */
r_extern:1, /* does not include value of sym referenced */
r_pad:4; /* nothing, yet */
};
struct rel_table {
struct rel_table *next, *resolve;
struct relocation_info r;
};
/*
* Format of a symbol table entry; this file is included by <a.out.h>
* and should be used if you aren't interested the a.out header
* or relocation information.
*/
struct nlist {
int4 n_strx; /* index into file string table */
unsigned char n_type; /* type flag, i.e. N_TEXT etc; see below */
char n_other; /* unused */
short n_desc; /* see <stab.h> */
uint4 n_value; /* value of this symbol (or sdb offset) */
};
struct sym_table {
struct sym_table *next;
struct nlist n;
struct rel_table *resolve;
unsigned short name_len;
unsigned char name[1];
};
/*
* Simple values for n_type.
*/
#define N_UNDF 0x0 /* undefined */
#define N_ABS 0x2 /* absolute */
#define N_TEXT 0x4 /* text */
#define N_DATA 0x6 /* data */
#define N_BSS 0x8 /* bss */
#define N_COMM 0x12 /* common (internal to ld) */
#define N_IPCOMM 0x16 /* initialized private */
#define N_PCOMM 0x18 /* uninitialized private */
#define N_FN 0x1f /* file name symbol */
#define N_EXT 01 /* external bit, or'ed in */
#define N_TYPE 0x1e /* mask for all the type bits */

View File

@ -427,8 +427,8 @@ const static readonly int error_ansi[] = {
0, /* JNLINVEXT */
0, /* MUPCLIERR */
0, /* JNLTMQUAL4 */
0, /* JNLBUFFTOOLG */
0, /* JNLBUFFTOOSM */
0, /* UNUSEDMSG594 */
0, /* UNUSEDMSG595 */
0, /* MUNODBNAME */
0, /* FILECREATE */
0, /* FILENOTCREATE */
@ -642,7 +642,7 @@ const static readonly int error_ansi[] = {
0, /* JNLRDONLY */
0, /* ANCOMPTINC */
0, /* ABNCOMPTINC */
0, /* GTMSECSHRLOGF */
0, /* UNUSEDMSG809 */
0, /* SOCKNOTFND */
0, /* CURRSOCKOFR */
79, /* SOCKETEXIST */
@ -731,8 +731,8 @@ const static readonly int error_ansi[] = {
0, /* SCNDDBNOUPD */
0, /* MUINFOUINT4 */
0, /* NLMISMATCHCALC */
0, /* GTMSECSHRLOGSWH */
0, /* GTMSECSHRDEFLOG */
0, /* UNUSEDMSG898 */
0, /* UNUSEDMSG899 */
0, /* DBBADNSUB */
0, /* DBBADKYNM */
0, /* DBBADPNTR */
@ -964,7 +964,7 @@ const static readonly int error_ansi[] = {
0, /* PREVJNLLINKCUT */
0, /* PREVJNLLINKSET */
0, /* FILENAMETOOLONG */
0, /* UNUSEDMSG1131 */
0, /* REQRECOV */
0, /* JNLTRANS2BIG */
0, /* JNLSWITCHTOOSM */
0, /* JNLSWITCHSZCHG */
@ -1088,7 +1088,7 @@ const static readonly int error_ansi[] = {
0, /* REPLINSTSEQORD */
0, /* REPLINSTSTNDALN */
0, /* REPLREQROLLBACK */
0, /* UNUSEDMSG1255 */
0, /* REQROLLBACK */
0, /* UNUSEDMSG1256 */
0, /* SRCSRVEXISTS */
0, /* SRCSRVNOTEXIST */
@ -1246,12 +1246,12 @@ const static readonly int error_ansi[] = {
0, /* NORESYNCUPDATERONLY */
0, /* NOSUPPLSUPPL */
0, /* REPL2OLD */
0, /* RCVR2MANY */
0, /* RLBKCONFIGBNDRY */
0, /* UNUSEDMSG1413 */
0, /* UNUSEDMSG1414 */
0, /* SECNOTSUPPLEMENTARY */
0, /* SUPRCVRNEEDSSUPSRC */
0, /* SYNCTOSAMETYPE */
0, /* TARGINSRUNNING */
0, /* UNUSEDMSG1417 */
0, /* UNUSEDMSG1418 */
0, /* UPDSYNC2MTINS */
0, /* UPDSYNCINSTFILE */
0, /* REUSEINSTNAME */
@ -1270,7 +1270,7 @@ const static readonly int error_ansi[] = {
0, /* ORLBKNOV4BLK */
0, /* DBROLLEDBACK */
0, /* DSEWCREINIT */
0, /* RNDWNSKIPCNT */
0, /* UNUSEDMSG1437 */
0, /* REPLONLNRLBK */
0, /* SRVLCKWT2LNG */
0, /* IGNBMPMRKFREE */
@ -1293,4 +1293,35 @@ const static readonly int error_ansi[] = {
0, /* STRMSEQMISMTCH */
0, /* LOCKSPACEINFO */
0, /* JRTNULLFAIL */
0, /* LOCKSUB2LONG */
0, /* RESRCWAIT */
0, /* RESRCINTRLCKBYPAS */
0, /* DBFHEADERRANY */
0, /* REPLINSTFROZEN */
0, /* REPLINSTFREEZECOMMENT */
0, /* REPLINSTUNFROZEN */
0, /* DSKNOSPCAVAIL */
0, /* DSKNOSPCBLOCKED */
0, /* DSKSPCAVAILABLE */
0, /* ENOSPCQIODEFER */
0, /* CUSTOMFILOPERR */
0, /* CUSTERRNOTFND */
0, /* CUSTERRSYNTAX */
0, /* ORLBKINPROG */
0, /* DBSPANGLOINCMP */
0, /* DBSPANCHUNKORD */
0, /* DBDATAMX */
0, /* DBIOERR */
0, /* INITORRESUME */
0, /* GTMSECSHRNOARG0 */
0, /* GTMSECSHRISNOT */
0, /* GTMSECSHRBADDIR */
0, /* JNLBUFFREGUPD */
0, /* JNLBUFFDBUPD */
0, /* LOCKINCR2HIGH */
0, /* LOCKIS */
0, /* LDSPANGLOINCMP */
0, /* MUFILRNDWNFL2 */
0, /* MUINSTFROZEN */
0, /* MUINSTUNFROZEN */
};

View File

@ -305,8 +305,8 @@ LITDEF err_msg merrors[] = {
"DBBLEVMN", "!AD Block level less than zero", 2,
"DBBSIZMN", "!AD Block too small", 2,
"DBBSIZMX", "!AD Block larger than file block size", 2,
"DBRSIZMN", "!AD Record too small", 2,
"DBRSIZMX", "!AD Record too large", 2,
"DBRSIZMN", "!AD Physical record too small", 2,
"DBRSIZMX", "!AD Physical record too large", 2,
"DBCMPNZRO", "!AD First record of block has nonzero compression count", 2,
"DBSTARSIZ", "!AD Star record has wrong size", 2,
"DBSTARCMP", "!AD Star record has nonzero compression count", 2,
@ -429,8 +429,8 @@ LITDEF err_msg merrors[] = {
"JNLINVEXT", "Journal file extension !UL is greater than the maximum allowed size of !UL. Journal file not created.", 2,
"MUPCLIERR", "Action not taken due to CLI errors", 0,
"JNLTMQUAL4", "Time qualifier BEFORE_TIME=\"!AZ\" is less than AFTER_TIME=\"!AZ\"", 2,
"JNLBUFFTOOLG", "Journal file buffer !UL is greater than the maximum allowed size of !UL. Journal file not created.", 2,
"JNLBUFFTOOSM", "Journal file buffer !UL is less than minimum of database block size in 512 byte pages + 1 (!UL)", 2,
"UNUSEDMSG594", "JNLBUFFTOOLG Last used in V5.5-000", 0,
"UNUSEDMSG595", "JNLBUFFTOOSM Last used in V5.5-000", 0,
"MUNODBNAME", "A database name or the region qualifier must be specified", 0,
"FILECREATE", "!AD file !AD created", 4,
"FILENOTCREATE", "!AD file !AD not created", 4,
@ -505,7 +505,7 @@ LITDEF err_msg merrors[] = {
"CENOINDIR", "Indirection type information not available for compiler escape feature", 0,
"COLLATIONUNDEF", "Collation type !UL is not defined", 1,
"RBWRNNOTCHG", "Not all specified database files were changed", 0,
"GTMSECSHRSRVF", "!AD - !UL : Attempt to service request failed", 3,
"GTMSECSHRSRVF", "!AD - !UL : Attempt to service request failed (retry = !UL)", 4,
"FREEZECTRL", "Control Y or control C encountered during attempt to freeze the database. Aborting freeze.", 0,
"JNLFLUSH", "Error flushing journal buffers to journal file !AD", 2,
"CCPSIGDMP", "CCP non fatal dump, continuing operation. Report to your GT.M Support Channel.", 0,
@ -583,11 +583,11 @@ LITDEF err_msg merrors[] = {
"BLKSIZ512", "Block size !UL rounds to !UL", 2,
"MUTEXERR", "Mutual Exclusion subsystem failure", 0,
"JNLVSIZE", "Journal File !AD has incorrect virtual_filesize !UL. Allocation : !UL, Extension : !UL, Filesize : !UL, File system block size : !UL", 7,
"MUTEXLCKALERT", "Mutual Exclusion subsystem ALERT - lock attempt threshold crossed for region !AD. Process !UL is in crit.", 3,
"MUTEXLCKALERT", "Mutual Exclusion subsystem ALERT - lock attempt threshold crossed for region !AD. Process !UL is in crit cycle !UL.", 4,
"MUTEXFRCDTERM", "Mutual Exclusion subsystem detected forced termination of process !UL. Crit salvaged from region !AD.", 3,
"GTMSECSHR", "!UL : Error during gtmsecshr operation", 1,
"GTMSECSHRSRVFID", "!AD: !UL - Attempt to service request failed.!/ client id: !UL, mesg type: !UL, mesg data: !UL.", 6,
"GTMSECSHRSRVFIL", "!AD: !UL - Attempt to service request failed.!/ client id: !UL, mesg type: !UL!/file: !AD.", 7,
"GTMSECSHRSRVFID", "!AD: !UL - Attempt to service request failed.!/ client id: !UL, mesg type: !UL, mesg data: !UL", 6,
"GTMSECSHRSRVFIL", "!AD: !UL - Attempt to service request failed.!/ client id: !UL, mesg type: !UL!/file: !AD", 7,
"SOCKACTNA", "Action not appropriate for current socket", 0,
"PROTNOTSUP", "Protocol !AD not supported", 2,
"DELIMSIZNA", "Delimiter size is not appropriate", 0,
@ -644,7 +644,7 @@ LITDEF err_msg merrors[] = {
"JNLRDONLY", "Journal file !AD read only", 2,
"ANCOMPTINC", "Deviceparameter !AD is not compatible with any other deviceparameters in the !AD command", 4,
"ABNCOMPTINC", "Deviceparameter !AD and deviceparameter !AD are not compatible in the !AD command", 6,
"GTMSECSHRLOGF", "!AD - !UL : Error while creating gtmsecshr log file", 3,
"UNUSEDMSG809", "GTMSECSHRLOGF last used in V5.5-000", 0,
"SOCKNOTFND", "Socket !AD not found", 2,
"CURRSOCKOFR", "Current socket of index !UL is out of range. There are only !UL sockets.", 2,
"SOCKETEXIST", "Socket !AD already exists", 2,
@ -733,8 +733,8 @@ LITDEF err_msg merrors[] = {
"SCNDDBNOUPD", "Database Updates not allowed on the secondary", 0,
"MUINFOUINT4", "!AD : !UL [0x!XL]", 4,
"NLMISMATCHCALC", "Location of !AD expected at 0x!XL, but found at 0x!XL", 4,
"GTMSECSHRLOGSWH", "Error switching gtmsecshr log file gtmsecshr log -- !AD original log -- !AD error phase -- !AD process id -- !UL", 7,
"GTMSECSHRDEFLOG", "$gtm_log is either undefined or not defined to an absolute path, thus gtm_log is set to its default !AD", 2,
"UNUSEDMSG898", "GTMSECSHRLOGSWH last used in V5.5-000", 0,
"UNUSEDMSG899", "GTMSECSHRDEFLOG last used in V5.5-000", 0,
"DBBADNSUB", "!AD Bad numeric subscript", 2,
"DBBADKYNM", "!AD Bad key name", 2,
"DBBADPNTR", "!AD Bad pointer value in directory", 2,
@ -813,8 +813,8 @@ LITDEF err_msg merrors[] = {
"DBADDRANGE8", "Database file !AD, element location 0x!XJ: blk = 0x!XL: control 0x!16@XQ was outside !AD range 0x!16@XQ to 0x!16@XQ", 9,
"RNDWNSEMFAIL", "Attempting to acquire gds_rundown semaphore when it is already owned", 0,
"GTMSECSHRSHUTDN", "gtmsecshr process has received a shutdown request -- shutting down", 0,
"NOSPACECRE", "Not enough space to create database file !AD. !UL blocks are needed, only !UL available.", 4,
"LOWSPACECRE", "Disk space for database file !AD is not enough for !UL future extensions. !UL !UL-byte blocks are needed, only !UL available.", 6,
"NOSPACECRE", "Not enough space to create database file !AD. !@ZQ blocks are needed, only !@ZQ available.", 4,
"LOWSPACECRE", "Disk space for database file !AD is not enough for !UL future extensions. !@ZQ !UL-byte blocks are needed, only !@ZQ available.", 6,
"WAITDSKSPACE", "Process 0x!XL will wait !UL seconds for necessary disk space to become available for !AD ", 4,
"OUTOFSPACE", "Database file !AD ran out of disk space. Detected by process !UL. !/Exit without clearing shared memory due to the disk space constraints. !/Make space and then perform mupip rundown to ensure database integrity.", 3,
"JNLPVTINFO", "Pid 0x!XL!/ cycle 0x!XL fd_mismatch 0x!XL channel 0x!XL sync_io 0x!XL!/ pini_addr 0x!XL qio_active 0x!XL old_channel 0x!XL", 8,
@ -966,7 +966,7 @@ LITDEF err_msg merrors[] = {
"PREVJNLLINKCUT", "Previous journal file name link set to NULL in new journal file !AD created for database file !AD", 4,
"PREVJNLLINKSET", "Previous generation journal file name is changed from !AD to !AD", 4,
"FILENAMETOOLONG", "File name too long", 0,
"UNUSEDMSG1131", "JNLCREATERR Last used in V5.4-001", 0,
"REQRECOV", "Error accessing database !AD. Must be recovered on cluster node !AD.", 4,
"JNLTRANS2BIG", "Transaction needs an estimated [!UL blocks] in journal file !AD which exceeds the AUTOSWITCHLIMIT of !UL blocks", 4,
"JNLSWITCHTOOSM", "Journal AUTOSWITCHLIMIT [!UL blocks] is less than Journal ALLOCATION [!UL blocks] for database file !AD", 4,
"JNLSWITCHSZCHG", "Journal AUTOSWITCHLIMIT [!UL blocks] is rounded down to [!UL blocks] to equal the sum of Journal ALLOCATION [!UL blocks] and a multiple of Journal EXTENSION [!UL blocks] for database file !AD", 6,
@ -1090,7 +1090,7 @@ LITDEF err_msg merrors[] = {
"REPLINSTSEQORD", "!AD has seqno [0x!16@XQ] which is less than last record seqno [0x!16@XQ] in replication instance file !AD", 6,
"REPLINSTSTNDALN", "Could not get exclusive access to replication instance file !AD", 2,
"REPLREQROLLBACK", "Replication instance file !AD indicates abnormal shutdown or an incomplete ROLLBACK. Run MUPIP JOURNAL ROLLBACK first", 2,
"UNUSEDMSG1255", "REPLUPGRADEPRI : Last used in V5.4-002B", 0,
"REQROLLBACK", "Error accessing database !AD. Run MUPIP JOURNAL ROLLBACK on cluster node !AD.", 4,
"UNUSEDMSG1256", "REPLUPGRADESEC : Last used in V5.4-002B", 0,
"SRCSRVEXISTS", "Source server for secondary instance !AD is already running with pid !UL", 3,
"SRCSRVNOTEXIST", "Source server for secondary instance !AD is not alive", 2,
@ -1132,7 +1132,7 @@ LITDEF err_msg merrors[] = {
"COMMITWAITPID", "Pid !UL waited !UL minute(s) for pid !UL to finish commits to block 0x!XL in database file !AD", 6,
"UPDREPLSTATEOFF", "Error replicating global ^!AD as it maps to database !AD which has replication turned OFF", 4,
"LITNONGRAPH", "M standard requires graphics in string literals", 0,
"DBFHEADERR8", "Database file !AD: control problem: !AD was 0x!XJ expecting 0x!XJ", 6,
"DBFHEADERR8", "Database file !AD: control problem: !AD was 0x!16@XQ expecting 0x!16@XQ", 6,
"MMBEFOREJNL", "BEFORE image journaling cannot be set with MM access method in database file !AD", 2,
"MMNOBFORRPL", "Replication cannot be used in database file !AD which uses MM access method and NOBEFORE image journaling", 2,
"KILLABANDONED", "Abandoned kills counter is greater than zero for file !AD, !AD", 4,
@ -1248,12 +1248,12 @@ LITDEF err_msg merrors[] = {
"NORESYNCUPDATERONLY", "NORESYNC qualifier only allowed on a Supplementary Instance which allows local updates", 0,
"NOSUPPLSUPPL", "Instance !AD is configured to perform local updates so it cannot receive from Supplementary Instance !AD", 4,
"REPL2OLD", "Instance !AD uses a GT.M version that does not support connection with the current version on instance !AD", 4,
"RCVR2MANY", "The instance already has the maximum supportable number of receiver servers [!UL] active", 1,
"RLBKCONFIGBNDRY", "Rollback encountered journal records indicating current source !AD replaced old source !AD; cannot rollback past sequence number 0x!16@XQ", 5,
"UNUSEDMSG1413", "RCVR2MANY: Never used before so slot free for reuse", 0,
"UNUSEDMSG1414", "RLBKCONFIGBNDRY: Never used before so slot free for reuse", 0,
"SECNOTSUPPLEMENTARY", "!AD is a Supplementary Instance and so cannot act as a source to non-Supplementary Instance !AD ", 4,
"SUPRCVRNEEDSSUPSRC", "Instance !AD is not configured to perform local updates so it cannot act as a receiver for non-Supplementary Instance !AD", 4,
"SYNCTOSAMETYPE", "Source instance !AD and receiver instance !AD must either be both supplementary or both non-supplementary for them to synchronize their state", 4,
"TARGINSRUNNING", "Cannot change the instance definition of instance !AD while it is running", 2,
"UNUSEDMSG1417", "SYNCTOSAMETYPE: Never used before so slot free for reuse", 0,
"UNUSEDMSG1418", "TARGINSRUNNING: Never used before so slot free for reuse", 0,
"UPDSYNC2MTINS", "Can only UPDATERESYNC with an empty instance file", 0,
"UPDSYNCINSTFILE", "Error with instance file name specified in UPDATERESYNC qualifier", 0,
"REUSEINSTNAME", "Error with instance name specified in REUSE qualifier", 0,
@ -1272,7 +1272,7 @@ LITDEF err_msg merrors[] = {
"ORLBKNOV4BLK", "Region !AD (!AD) has V4 format blocks. Database upgrade required. ONLINE ROLLBACK cannot continue", 4,
"DBROLLEDBACK", "Concurrent ONLINE ROLLBACK detected on one or more regions. The current operation is no longer valid", 0,
"DSEWCREINIT", "Database cache reinitialized by DSE for region !AD", 2,
"RNDWNSKIPCNT", "A total of !UL process(es) skipped database rundown due to a concurrent ONLINE ROLLBACK", 1,
"UNUSEDMSG1437", "A total of !UL process(es) skipped database rundown due to a concurrent ONLINE ROLLBACK", 1,
"REPLONLNRLBK", "ONLINE ROLLBACK detected. Starting afresh", 0,
"SRVLCKWT2LNG", "PID !UL is holding the source server lock. Waited for !UL minute(s). Now exiting", 2,
"IGNBMPMRKFREE", "Ignoring bitmap free-up operation for region !AD (!AD) due to concurrent ONLINE ROLLBACK", 4,
@ -1295,6 +1295,37 @@ LITDEF err_msg merrors[] = {
"STRMSEQMISMTCH", "Unable to play update on Stream !2UL with seqno [0x!16@XQ] as receiving instance has a different stream seqno [0x!16@XQ]", 3,
"LOCKSPACEINFO", "Region: !AD: processes on queue: !UL/!UL; LOCK slots in use: !UL/!UL; name space!ADfull", 8,
"JRTNULLFAIL", "Applying NULL journal record failed. Failure code: !AD.", 2,
"LOCKSUB2LONG", "Following subscript is !UL bytes long which exceeds 255 byte limit.", 1,
"RESRCWAIT", "Waiting briefly for the !AD semaphore for region !AD (!AD) was held by PID !UL (Sem. ID: !UL).", 8,
"RESRCINTRLCKBYPAS", "!AD with PID !UL bypassing the !AD semaphore for region !AD (!AD) was held by PID !UL.", 10,
"DBFHEADERRANY", "Database file !AD: control problem: !AD was 0x!XJ expecting 0x!XJ", 6,
"REPLINSTFROZEN", "Instance !AZ is now Frozen", 1,
"REPLINSTFREEZECOMMENT", "Freeze Comment: !AZ", 1,
"REPLINSTUNFROZEN", "Instance !AZ is now Unfrozen", 1,
"DSKNOSPCAVAIL", "Attempted write to file !AD failed due to lack of disk space. Retrying indefinitely.", 2,
"DSKNOSPCBLOCKED", "Retry of write to file !AD suspended due to new instance freeze. Waiting for instance to be unfrozen.", 2,
"DSKSPCAVAILABLE", "Write to file !AD succeeded after out-of-space condition cleared", 2,
"ENOSPCQIODEFER", "Write to file !AD deferred due to lack of disk space", 2,
"CUSTOMFILOPERR", "Error while doing !AD operation on file !AD", 4,
"CUSTERRNOTFND", "Error mnemonic !AD specified in custom errors file is not valid for this version of GT.M", 2,
"CUSTERRSYNTAX", "Syntax error in file !AD at line number !UL", 3,
"ORLBKINPROG", "Online ROLLBACK in progress by PID !UL in region !AD", 3,
"DBSPANGLOINCMP", "!AD Spanning node is missing. Block no !UL of spanning node is missing", 3,
"DBSPANCHUNKORD", "!AD Chunk of !UL blocks is out of order", 3,
"DBDATAMX", "!AD Record too large", 2,
"DBIOERR", "Error while doing write operation on region !AD (!AD)", 4,
"INITORRESUME", "UPDATERESYNC on a Supplementary Instance must additionally specify INITIALIZE or RESUME", 0,
"GTMSECSHRNOARG0", "gtmsecshr cannot identify its origin - argv[0] is null", 0,
"GTMSECSHRISNOT", "gtmsecshr is not running as gtmsecshr but !AD - must be gtmsecshr", 2,
"GTMSECSHRBADDIR", "gtmsecshr is not running from $gtm_dist/gtmsecshrdir or $gtm_dist cannot be determined", 0,
"JNLBUFFREGUPD", "Journal file buffer size for region !AD has been adjusted from !UL to !UL.", 4,
"JNLBUFFDBUPD", "Journal file buffer size for database file !AD has been adjusted from !UL to !UL.", 4,
"LOCKINCR2HIGH", "Attempt to increment a LOCK more than !UL times", 1,
"LOCKIS", "!_!_Resource name: !AD", 2,
"LDSPANGLOINCMP", "Incomplete spanning node found during load", 0,
"MUFILRNDWNFL2", "Database section (id = !UL) belonging to database file !AD rundown failed", 3,
"MUINSTFROZEN", "!AD : Instance !AZ is frozen. Waiting for instance to be unfrozen before proceeding with writes to database file !AD", 5,
"MUINSTUNFROZEN", "!AD : Instance !AZ is now Unfrozen. Continuing with writes to database file !AD", 5,
};
LITDEF int ERR_ACK = 150372361;
@ -1383,7 +1414,7 @@ LITDEF int ERR_INDMAXNEST = 150373018;
LITDEF int ERR_INDRMAXLEN = 150373026;
LITDEF int ERR_INSFFBCNT = 150373034;
LITDEF int ERR_INTEGERRS = 150373042;
LITDEF int ERR_INVCMD = 150373050;
LITDEF int ERR_INVCMD = 150373048;
LITDEF int ERR_INVFCN = 150373058;
LITDEF int ERR_INVOBJ = 150373066;
LITDEF int ERR_INVSVN = 150373074;
@ -1713,8 +1744,8 @@ LITDEF int ERR_JNLINVALLOC = 150375656;
LITDEF int ERR_JNLINVEXT = 150375664;
LITDEF int ERR_MUPCLIERR = 150375674;
LITDEF int ERR_JNLTMQUAL4 = 150375682;
LITDEF int ERR_JNLBUFFTOOLG = 150375688;
LITDEF int ERR_JNLBUFFTOOSM = 150375696;
LITDEF int ERR_UNUSEDMSG594 = 150375690;
LITDEF int ERR_UNUSEDMSG595 = 150375698;
LITDEF int ERR_MUNODBNAME = 150375706;
LITDEF int ERR_FILECREATE = 150375715;
LITDEF int ERR_FILENOTCREATE = 150375723;
@ -1928,7 +1959,7 @@ LITDEF int ERR_MUKILLIP = 150377376;
LITDEF int ERR_JNLRDONLY = 150377386;
LITDEF int ERR_ANCOMPTINC = 150377394;
LITDEF int ERR_ABNCOMPTINC = 150377402;
LITDEF int ERR_GTMSECSHRLOGF = 150377410;
LITDEF int ERR_UNUSEDMSG809 = 150377410;
LITDEF int ERR_SOCKNOTFND = 150377418;
LITDEF int ERR_CURRSOCKOFR = 150377426;
LITDEF int ERR_SOCKETEXIST = 150377434;
@ -2017,8 +2048,8 @@ LITDEF int ERR_SECONDAHEAD = 150378090;
LITDEF int ERR_SCNDDBNOUPD = 150378098;
LITDEF int ERR_MUINFOUINT4 = 150378107;
LITDEF int ERR_NLMISMATCHCALC = 150378114;
LITDEF int ERR_GTMSECSHRLOGSWH = 150378122;
LITDEF int ERR_GTMSECSHRDEFLOG = 150378131;
LITDEF int ERR_UNUSEDMSG898 = 150378122;
LITDEF int ERR_UNUSEDMSG899 = 150378131;
LITDEF int ERR_DBBADNSUB = 150378138;
LITDEF int ERR_DBBADKYNM = 150378146;
LITDEF int ERR_DBBADPNTR = 150378154;
@ -2250,7 +2281,7 @@ LITDEF int ERR_JNLFNF = 150379955;
LITDEF int ERR_PREVJNLLINKCUT = 150379963;
LITDEF int ERR_PREVJNLLINKSET = 150379971;
LITDEF int ERR_FILENAMETOOLONG = 150379978;
LITDEF int ERR_UNUSEDMSG1131 = 150379986;
LITDEF int ERR_REQRECOV = 150379986;
LITDEF int ERR_JNLTRANS2BIG = 150379994;
LITDEF int ERR_JNLSWITCHTOOSM = 150380002;
LITDEF int ERR_JNLSWITCHSZCHG = 150380011;
@ -2374,7 +2405,7 @@ LITDEF int ERR_REPLINSTSECUNDF = 150380946;
LITDEF int ERR_REPLINSTSEQORD = 150380954;
LITDEF int ERR_REPLINSTSTNDALN = 150380962;
LITDEF int ERR_REPLREQROLLBACK = 150380970;
LITDEF int ERR_UNUSEDMSG1255 = 150380978;
LITDEF int ERR_REQROLLBACK = 150380978;
LITDEF int ERR_UNUSEDMSG1256 = 150380986;
LITDEF int ERR_SRCSRVEXISTS = 150380994;
LITDEF int ERR_SRCSRVNOTEXIST = 150381002;
@ -2532,12 +2563,12 @@ LITDEF int ERR_NORESYNCSUPPLONLY = 150382210;
LITDEF int ERR_NORESYNCUPDATERONLY = 150382218;
LITDEF int ERR_NOSUPPLSUPPL = 150382226;
LITDEF int ERR_REPL2OLD = 150382234;
LITDEF int ERR_RCVR2MANY = 150382242;
LITDEF int ERR_RLBKCONFIGBNDRY = 150382250;
LITDEF int ERR_UNUSEDMSG1413 = 150382243;
LITDEF int ERR_UNUSEDMSG1414 = 150382251;
LITDEF int ERR_SECNOTSUPPLEMENTARY = 150382258;
LITDEF int ERR_SUPRCVRNEEDSSUPSRC = 150382266;
LITDEF int ERR_SYNCTOSAMETYPE = 150382274;
LITDEF int ERR_TARGINSRUNNING = 150382282;
LITDEF int ERR_UNUSEDMSG1417 = 150382275;
LITDEF int ERR_UNUSEDMSG1418 = 150382283;
LITDEF int ERR_UPDSYNC2MTINS = 150382290;
LITDEF int ERR_UPDSYNCINSTFILE = 150382298;
LITDEF int ERR_REUSEINSTNAME = 150382306;
@ -2556,7 +2587,7 @@ LITDEF int ERR_ORLBKFRZOVER = 150382403;
LITDEF int ERR_ORLBKNOV4BLK = 150382410;
LITDEF int ERR_DBROLLEDBACK = 150382418;
LITDEF int ERR_DSEWCREINIT = 150382427;
LITDEF int ERR_RNDWNSKIPCNT = 150382435;
LITDEF int ERR_UNUSEDMSG1437 = 150382435;
LITDEF int ERR_REPLONLNRLBK = 150382442;
LITDEF int ERR_SRVLCKWT2LNG = 150382450;
LITDEF int ERR_IGNBMPMRKFREE = 150382459;
@ -2579,9 +2610,40 @@ LITDEF int ERR_STRMNUMMISMTCH2 = 150382586;
LITDEF int ERR_STRMSEQMISMTCH = 150382594;
LITDEF int ERR_LOCKSPACEINFO = 150382603;
LITDEF int ERR_JRTNULLFAIL = 150382610;
LITDEF int ERR_LOCKSUB2LONG = 150382618;
LITDEF int ERR_RESRCWAIT = 150382627;
LITDEF int ERR_RESRCINTRLCKBYPAS = 150382635;
LITDEF int ERR_DBFHEADERRANY = 150382643;
LITDEF int ERR_REPLINSTFROZEN = 150382650;
LITDEF int ERR_REPLINSTFREEZECOMMENT = 150382659;
LITDEF int ERR_REPLINSTUNFROZEN = 150382667;
LITDEF int ERR_DSKNOSPCAVAIL = 150382675;
LITDEF int ERR_DSKNOSPCBLOCKED = 150382682;
LITDEF int ERR_DSKSPCAVAILABLE = 150382691;
LITDEF int ERR_ENOSPCQIODEFER = 150382699;
LITDEF int ERR_CUSTOMFILOPERR = 150382706;
LITDEF int ERR_CUSTERRNOTFND = 150382714;
LITDEF int ERR_CUSTERRSYNTAX = 150382722;
LITDEF int ERR_ORLBKINPROG = 150382731;
LITDEF int ERR_DBSPANGLOINCMP = 150382738;
LITDEF int ERR_DBSPANCHUNKORD = 150382746;
LITDEF int ERR_DBDATAMX = 150382754;
LITDEF int ERR_DBIOERR = 150382762;
LITDEF int ERR_INITORRESUME = 150382770;
LITDEF int ERR_GTMSECSHRNOARG0 = 150382778;
LITDEF int ERR_GTMSECSHRISNOT = 150382786;
LITDEF int ERR_GTMSECSHRBADDIR = 150382794;
LITDEF int ERR_JNLBUFFREGUPD = 150382800;
LITDEF int ERR_JNLBUFFDBUPD = 150382808;
LITDEF int ERR_LOCKINCR2HIGH = 150382818;
LITDEF int ERR_LOCKIS = 150382827;
LITDEF int ERR_LDSPANGLOINCMP = 150382834;
LITDEF int ERR_MUFILRNDWNFL2 = 150382843;
LITDEF int ERR_MUINSTFROZEN = 150382851;
LITDEF int ERR_MUINSTUNFROZEN = 150382859;
GBLDEF err_ctl merrors_ctl = {
246,
"GTM",
&merrors[0],
1282};
1313};

32
sr_arm/mint2mval.s Normal file
View File

@ -0,0 +1,32 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global mint2mval
.type mint2mval, %function
mint2mval:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size mint2mval, .-mint2mval

View File

@ -1,6 +1,6 @@
/****************************************************************
* *
* Copyright 2001 Sanchez Computer Associates, Inc. *
* Copyright 2001, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
@ -9,14 +9,14 @@
* *
****************************************************************/
#include "mdef.h"
#include "gt_timer.h"
#include "crit_wake_alarm.h"
GBLDEF bool crit_timer_expired;
void crit_wake_alarm(void)
int mum_tstart(void)
{
crit_timer_expired = TRUE;
GT_WAKE;
if(1)
{
getframe();
} else
{
trans_code();
}
return 0;
}

28
sr_arm/mum_tstart.s Normal file
View File

@ -0,0 +1,28 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global mum_tstart_arm
.type mum_tstart_arm, %function
mum_tstart_arm:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size mum_tstart_arm, .-mum_tstart_arm

32
sr_arm/mval2bool.s Normal file
View File

@ -0,0 +1,32 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global mval2bool
.type mval2bool, %function
mval2bool:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size mval2bool, .-mval2bool

32
sr_arm/mval2mint.s Normal file
View File

@ -0,0 +1,32 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global mval2mint
.type mval2mint, %function
mval2mint:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size mval2mint, .-mval2mint

32
sr_arm/mval2num.s Normal file
View File

@ -0,0 +1,32 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global mval2num
.type mval2num, %function
mval2num:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size mval2num, .-mval2num

479
sr_arm/obj_file.c Normal file
View File

@ -0,0 +1,479 @@
/****************************************************************
* *
* Copyright 2001, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "gtm_string.h"
#include <errno.h>
#include "compiler.h"
#include <rtnhdr.h>
#include "obj_gen.h"
#include "cgp.h"
#include "mdq.h"
#include "cmd_qlf.h"
#include "objlabel.h" /* needed for masscomp.h */
#include "masscomp.h"
#include "stringpool.h"
#include "parse_file.h"
#include "gtm_fcntl.h"
#include "gtm_unistd.h"
#include "gtmio.h"
#include "mmemory.h"
#include "obj_file.h"
LITREF char gtm_release_name[];
LITREF int4 gtm_release_name_len;
GBLREF mliteral literal_chain;
GBLREF char source_file_name[];
GBLREF unsigned short source_name_len;
GBLREF command_qualifier cmd_qlf;
GBLREF mident routine_name;
GBLREF mident module_name;
GBLREF boolean_t run_time;
GBLREF int4 mlmax, mvmax;
GBLREF int4 code_size, lit_addrs, lits_size;
GBLDEF int4 psect_use_tab[GTM_LASTPSECT]; /* bytes of each psect in this module */
GBLREF char object_file_name[];
GBLREF short object_name_len;
GBLREF int object_file_des;
static short int current_psect;
static char emit_buff[OBJ_EMIT_BUF_SIZE]; /* buffer for emit output */
static short int emit_buff_used; /* number of chars in emit_buff */
GBLREF uint4 txtrel_cnt;
static uint4 cdlits;
static struct rel_table *data_rel, *data_rel_end;
static struct rel_table *text_rel, *text_rel_end;
DEBUG_ONLY(static uint4 txtrel_cnt_in_hdr;)
error_def(ERR_OBJFILERR);
void create_object_file(rhdtyp *rhead)
{
int status;
unsigned char rout_len;
uint4 stat;
char obj_name[SIZEOF(mident_fixed) + 5];
mstr fstr;
parse_blk pblk;
struct exec hdr;
error_def(ERR_FILEPARSE);
assert(!run_time);
memset(&pblk, 0, SIZEOF(pblk));
pblk.buffer = object_file_name;
pblk.buff_size = MAX_FBUFF;
/* create the object file */
fstr.len = (MV_DEFINED(&cmd_qlf.object_file) ? cmd_qlf.object_file.str.len : 0);
fstr.addr = cmd_qlf.object_file.str.addr;
rout_len = module_name.len;
memcpy(&obj_name[0], module_name.addr, rout_len);
obj_name[rout_len] = '.';
obj_name[rout_len + 1] = 'o';
obj_name[rout_len + 2] = 0;
pblk.def1_size = rout_len + 2;
pblk.def1_buf = obj_name;
status = parse_file(&fstr, &pblk);
if (!(status & 1))
rts_error(VARLSTCNT(5) ERR_FILEPARSE, 2, fstr.len, fstr.addr, status);
object_name_len = pblk.b_esl;
object_file_name[object_name_len] = 0;
OPEN_OBJECT_FILE(object_file_name, O_CREAT | O_RDWR, object_file_des);
if (FD_INVALID == object_file_des)
rts_error(VARLSTCNT(5) ERR_OBJFILERR, 2, object_name_len, object_file_name, errno);
memcpy(&rhead->jsb[0], "GTM_CODE", SIZEOF(rhead->jsb));
emit_addr((char *)&rhead->src_full_name.addr - (char *)rhead,
(int4)rhead->src_full_name.addr, (int4 *)&rhead->src_full_name.addr);
emit_addr((char *)&rhead->routine_name.addr - (char *)rhead,
(int4)rhead->routine_name.addr, (int4 *)&rhead->routine_name.addr);
txtrel_cnt += 2;
DEBUG_ONLY(txtrel_cnt_in_hdr = txtrel_cnt;)
set_psect(GTM_CODE, 0);
hdr.a_magic = OMAGIC;
hdr.a_stamp = OBJ_LABEL;
hdr.a_entry = 0;
hdr.a_bss = 0;
hdr.a_text = code_size;
assert(0 == PADLEN(lits_size, NATIVE_WSIZE));
hdr.a_data = lits_size; /* and pad to even # */
hdr.a_syms = (mlmax + cdlits) * SIZEOF(struct nlist);
hdr.a_trsize = txtrel_cnt * SIZEOF(struct relocation_info);
hdr.a_drsize = lit_addrs * SIZEOF(struct relocation_info);
emit_immed((char *)&hdr, SIZEOF(hdr));
memset(psect_use_tab, 0, SIZEOF(psect_use_tab));
emit_immed((char *)rhead, SIZEOF(*rhead));
}
void close_object_file(void)
{
assert(0 == PADLEN(lits_size, NATIVE_WSIZE));
resolve_sym();
output_relocation();
output_symbol();
if (emit_buff_used)
buff_emit();
if ((off_t)-1 == lseek(object_file_des, (off_t)0, SEEK_SET))
rts_error(VARLSTCNT(5) ERR_OBJFILERR, 2, object_name_len, object_file_name, errno);
}
void drop_object_file(void)
{
int rc;
if (FD_INVALID != object_file_des)
{
UNLINK(object_file_name);
CLOSEFILE_RESET(object_file_des, rc); /* resets "object_file_des" to FD_INVALID */
}
}
GBLREF spdesc stringpool;
void emit_addr(int4 refaddr, int4 offset, int4 *result)
{
struct rel_table *newrel;
if (run_time)
{
unsigned char *ptr;
ptr = stringpool.free;
*result = offset - (int4) ptr;
} else
{ *result = offset + code_size;
newrel = (struct rel_table *) mcalloc(SIZEOF(struct rel_table));
newrel->next = (struct rel_table *) 0;
newrel->resolve = 0;
newrel->r.r_address = refaddr;
newrel->r.r_symbolnum = N_DATA;
newrel->r.r_pcrel = 0;
newrel->r.r_length = 2;
newrel->r.r_extern = 0;
newrel->r.r_pad = 0;
if (!text_rel)
text_rel = text_rel_end = newrel;
else
{ text_rel_end->next = newrel;
text_rel_end = newrel;
}
}
return;
}
void emit_pidr(int4 refoffset, int4 data_offset, int4 *result)
{
struct rel_table *newrel;
assert(!run_time);
refoffset += code_size;
data_offset += code_size;
*result = data_offset;
newrel = (struct rel_table *) mcalloc(SIZEOF(struct rel_table));
newrel->next = (struct rel_table *)0;
newrel->resolve = 0;
newrel->r.r_address = refoffset;
newrel->r.r_symbolnum = N_DATA;
newrel->r.r_pcrel = 0;
newrel->r.r_length = 2;
newrel->r.r_extern = 0;
newrel->r.r_pad = 0;
if (!data_rel)
data_rel = data_rel_end = newrel;
else
{ data_rel_end->next = newrel;
data_rel_end = newrel;
}
}
void emit_reference(uint4 refaddr, mstr *name, uint4 *result)
{
struct sym_table *sym;
struct rel_table *newrel;
sym = define_symbol(0, name, 0);
assert(sym);
if (sym->n.n_type == (N_TEXT | N_EXT))
*result = sym->n.n_value;
else
{
newrel = (struct rel_table *) mcalloc(SIZEOF(struct rel_table));
newrel->next = (struct rel_table *)0;
newrel->resolve = 0;
newrel->r.r_address = refaddr;
newrel->r.r_symbolnum = 0;
newrel->r.r_pcrel = 0;
newrel->r.r_length = 2;
newrel->r.r_extern = 1;
newrel->r.r_pad = 0;
if (!text_rel)
text_rel = text_rel_end = newrel;
else
{ text_rel_end->next = newrel;
text_rel_end = newrel;
}
if (sym->resolve)
newrel->resolve = sym->resolve;
sym->resolve = newrel;
*result = 0;
}
}
/*
* emit_immed
*
* Args: buffer of executable code, and byte count to be output.
*/
error_def(ERR_STRINGOFLOW);
void emit_immed(char *source, uint4 size)
{
short int write;
if (run_time)
{
if (stringpool.free + size > stringpool.top)
rts_error(VARLSTCNT(1) ERR_STRINGOFLOW);
memcpy(stringpool.free, source, size);
stringpool.free += size;
} else
{ while(size > 0)
{
write = SIZEOF(emit_buff) - emit_buff_used;
write = size < write ? size : write;
memcpy(emit_buff + emit_buff_used, source, write);
size -= write;
source += write;
emit_buff_used += write;
psect_use_tab[current_psect] += write;
if (size)
buff_emit();
}
}
}
/*
* buff_emit
*
* Args: buffer pointer, number of bytes to emit
*/
void buff_emit(void)
{
uint4 stat;
if (-1 == write(object_file_des, emit_buff, emit_buff_used))
rts_error(VARLSTCNT(5) ERR_OBJFILERR, 2, object_name_len, object_file_name, errno);
emit_buff_used = 0;
}
void set_psect(unsigned char psect,unsigned char offset)
{
current_psect = psect;
return;
}
/*
* define_symbol
*
* Args: psect index, symbol name, symbol value.
*
* Description: Buffers a definition of a global symbol with the
* given name and value in the given psect.
*/
static struct sym_table *symbols;
struct sym_table *define_symbol(unsigned char psect, mstr *name, int4 value)
{
int cmp;
struct sym_table *sym, *sym1, *newsym;
sym = symbols;
sym1 = 0;
while(sym)
{
if ((cmp = memvcmp(name->addr, name->len, &sym->name[0], sym->name_len - 1)) <= 0)
break;
sym1 = sym;
sym = sym->next;
}
if (cmp || !sym)
{ newsym = (struct sym_table *) mcalloc(SIZEOF(struct sym_table) + name->len);
newsym->name_len = name->len + 1;
memcpy(&newsym->name[0], name->addr, name->len);
newsym->name[ name->len ] = 0;
newsym->n.n_strx = 0;
newsym->n.n_type = N_EXT;
if (psect == GTM_CODE)
newsym->n.n_type |= N_TEXT; /* if symbol is in GTM_CODE, it is defined */
else
txtrel_cnt++;
newsym->n.n_other = 0;
newsym->n.n_desc = 0;
newsym->n.n_value = value;
newsym->resolve = 0;
newsym->next = sym;
if (sym1)
sym1->next = newsym;
else
symbols = newsym;
cdlits++;
return 0;
}
if (!(sym->n.n_type & N_TEXT))
txtrel_cnt++;
return sym;
}
void resolve_sym(void)
{
uint4 symnum;
struct sym_table *sym;
struct rel_table *rel;
symnum = 0;
sym = symbols;
while (sym)
{ if (sym->resolve)
{ rel = sym->resolve;
while (rel)
{ rel->r.r_symbolnum = symnum;
rel = rel->resolve;
}
}
symnum++;
sym = sym->next;
}
}
void output_relocation(void)
{
struct rel_table *rel;
DEBUG_ONLY(int cnt;)
DEBUG_ONLY(cnt = 0;)
rel = text_rel;
while (rel)
{
emit_immed((char *)&rel->r, SIZEOF(rel->r));
rel = rel->next;
DEBUG_ONLY(cnt++;)
}
assert(cnt == txtrel_cnt_in_hdr);
DEBUG_ONLY(cnt = 0;)
rel = data_rel;
while (rel)
{
emit_immed((char *)&rel->r, SIZEOF(rel->r));
rel = rel->next;
DEBUG_ONLY(cnt++;)
}
assert(cnt == lit_addrs);
}
void output_symbol(void)
{
uint4 string_length;
struct sym_table *sym;
string_length = SIZEOF(int4);
sym = symbols;
while (sym)
{
sym->n.n_strx = string_length;
emit_immed((char *)&sym->n, SIZEOF(sym->n));
string_length += sym->name_len;
sym = sym->next;
}
emit_immed((char *)&string_length, SIZEOF(string_length));
sym = symbols;
while (sym)
{
emit_immed((char *)&sym->name[0], sym->name_len);
sym = sym->next;
}
}
void obj_init(void)
{
cdlits = txtrel_cnt = 0;
data_rel = text_rel = data_rel_end = text_rel_end = 0;
symbols = 0;
}
void emit_literals(void)
{
uint4 offset, padsize;
mliteral *p;
set_psect(GTM_LITERALS, 0);
offset = stringpool.free - stringpool.base;
emit_immed((char *)stringpool.base, offset);
/* comp_lits aligns the start of source path on a NATIVE_WSIZE boundary.*/
padsize = PADLEN(offset, NATIVE_WSIZE);
if (padsize)
{
emit_immed(PADCHARS, padsize);
offset += padsize;
}
emit_immed(source_file_name, source_name_len);
offset += source_name_len;
/* comp_lits aligns the start of routine_name on a NATIVE_WSIZE boundary.*/
padsize = PADLEN(offset, NATIVE_WSIZE);
if (padsize)
{
emit_immed(PADCHARS, padsize);
offset += padsize;
}
emit_immed(routine_name.addr, routine_name.len);
offset += routine_name.len;
/* comp_lits aligns the start of the literal area on a NATIVE_WSIZE boundary.*/
padsize = PADLEN(offset, NATIVE_WSIZE);
if (padsize)
{
emit_immed(PADCHARS, padsize);
offset += padsize;
}
dqloop(&literal_chain, que, p)
{
assert (p->rt_addr == offset);
MV_FORCE_NUMD(&p->v);
if (p->v.str.len)
emit_pidr(p->rt_addr + ((char *) &p->v.str.addr - (char *)&p->v),
p->v.str.addr - (char *) stringpool.base, (int4 *)&p->v.str.addr);
else
p->v.str.addr = 0;
emit_immed((char *)&p->v, SIZEOF(p->v));
offset += SIZEOF(p->v);
}
assert(lits_size == offset);
}

56
sr_arm/op_call.s Normal file
View File

@ -0,0 +1,56 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_callb
.type op_callb, %function
op_callb:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_callb, .-op_callb
.align 2
.global op_calll
.type op_calll, %function
op_calll:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_calll, .-op_calll
.align 2
.global op_callw
.type op_callw, %function
op_callw:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_callw, .-op_callw

56
sr_arm/op_callsp.s Normal file
View File

@ -0,0 +1,56 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_callspb
.type op_callspb, %function
op_callspb:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_callspb, .-op_callspb
.align 2
.global op_callspl
.type op_callspl, %function
op_callspl:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_callspl, .-op_callspl
.align 2
.global op_callspw
.type op_callspw, %function
op_callspw:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_callspw, .-op_callspw

27
sr_arm/op_contain.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_contain
.type op_contain, %function
op_contain:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_contain, .-op_contain

27
sr_arm/op_currtn.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_currtn
.type op_currtn, %function
op_currtn:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_currtn, .-op_currtn

27
sr_arm/op_equ.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_equ
.type op_equ, %function
op_equ:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_equ, .-op_equ

27
sr_arm/op_equnul.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_equnul
.type op_equnul, %function
op_equnul:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_equnul, .-op_equnul

27
sr_arm/op_exfun.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_exfun
.type op_exfun, %function
op_exfun:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_exfun, .-op_exfun

27
sr_arm/op_extcall.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_extcall
.type op_extcall, %function
op_extcall:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_extcall, .-op_extcall

27
sr_arm/op_extexfun.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_extexfun
.type op_extexfun, %function
op_extexfun:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_extexfun, .-op_extexfun

27
sr_arm/op_extjmp.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_extjmp
.type op_extjmp, %function
op_extjmp:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_extjmp, .-op_extjmp

30
sr_arm/op_fetchintrrpt.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_fetchintrrpt
.type op_fetchintrrpt, %function
op_fetchintrrpt:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_fetchintrrpt, .-op_fetchintrrpt

30
sr_arm/op_fnget.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_fnget
.type op_fnget, %function
op_fnget:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_fnget, .-op_fnget

30
sr_arm/op_fnzextract.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_fnzextract
.type op_fnzextract, %function
op_fnzextract:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_fnzextract, .-op_fnzextract

30
sr_arm/op_follow.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_follow
.type op_follow, %function
op_follow:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_follow, .-op_follow

30
sr_arm/op_forcenum.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forcenum
.type op_forcenum, %function
op_forcenum:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forcenum, .-op_forcenum

30
sr_arm/op_forchk1.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forchk1
.type op_forchk1, %function
op_forchk1:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forchk1, .-op_forchk1

30
sr_arm/op_forinit.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forinit
.type op_forinit, %function
op_forinit:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forinit, .-op_forinit

30
sr_arm/op_forintrrpt.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forintrrpt
.type op_forintrrpt, %function
op_forintrrpt:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forintrrpt, .-op_forintrrpt

30
sr_arm/op_forlcldob.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forlcldob
.type op_forlcldob, %function
op_forlcldob:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forlcldob, .-op_forlcldob

30
sr_arm/op_forlcldol.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forlcldol
.type op_forlcldol, %function
op_forlcldol:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forlcldol, .-op_forlcldol

30
sr_arm/op_forlcldow.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forlcldow
.type op_forlcldow, %function
op_forlcldow:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forlcldow, .-op_forlcldow

30
sr_arm/op_forloop.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forloop
.type op_forloop, %function
op_forloop:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forloop, .-op_forloop

30
sr_arm/op_gettruth.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_gettruth
.type op_gettruth, %function
op_gettruth:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_gettruth, .-op_gettruth

30
sr_arm/op_iretmvad.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_iretmvad
.type op_iretmvad, %function
op_iretmvad:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_iretmvad, .-op_iretmvad

30
sr_arm/op_linefetch.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_linefetch
.type op_linefetch, %function
op_linefetch:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_linefetch, .-op_linefetch

30
sr_arm/op_linestart.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_linestart
.type op_linestart, %function
op_linestart:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_linestart, .-op_linestart

30
sr_arm/op_mprofcallb.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofcallb
.type op_mprofcallb, %function
op_mprofcallb:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofcallb, .-op_mprofcallb

30
sr_arm/op_mprofcalll.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofcalll
.type op_mprofcalll, %function
op_mprofcalll:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofcalll, .-op_mprofcalll

30
sr_arm/op_mprofcallspb.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofcallspb
.type op_mprofcallspb, %function
op_mprofcallspb:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofcallspb, .-op_mprofcallspb

30
sr_arm/op_mprofcallspl.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofcallspl
.type op_mprofcallspl, %function
op_mprofcallspl:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofcallspl, .-op_mprofcallspl

30
sr_arm/op_mprofcallspw.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofcallspw
.type op_mprofcallspw, %function
op_mprofcallspw:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofcallspw, .-op_mprofcallspw

30
sr_arm/op_mprofcallw.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofcallw
.type op_mprofcallw, %function
op_mprofcallw:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofcallw, .-op_mprofcallw

30
sr_arm/op_mprofexfun.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofexfun
.type op_mprofexfun, %function
op_mprofexfun:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofexfun, .-op_mprofexfun

30
sr_arm/op_mprofextcall.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofextcall
.type op_mprofextcall, %function
op_mprofextcall:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofextcall, .-op_mprofextcall

30
sr_arm/op_mprofextexfun.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofextexfun
.type op_mprofextexfun, %function
op_mprofextexfun:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofextexfun, .-op_mprofextexfun

30
sr_arm/op_mprofforchk1.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofforchk1
.type op_mprofforchk1, %function
op_mprofforchk1:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofforchk1, .-op_mprofforchk1

View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofforlcldob
.type op_mprofforlcldob, %function
op_mprofforlcldob:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofforlcldob, .-op_mprofforlcldob

View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofforlcldol
.type op_mprofforlcldol, %function
op_mprofforlcldol:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofforlcldol, .-op_mprofforlcldol

View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofforlcldow
.type op_mprofforlcldow, %function
op_mprofforlcldow:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofforlcldow, .-op_mprofforlcldow

View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mproflinefetch
.type op_mproflinefetch, %function
op_mproflinefetch:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mproflinefetch, .-op_mproflinefetch

View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mproflinestart
.type op_mproflinestart, %function
op_mproflinestart:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mproflinestart, .-op_mproflinestart

30
sr_arm/op_neg.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_neg
.type op_neg, %function
op_neg:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_neg, .-op_neg

30
sr_arm/op_numcmp.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_numcmp
.type op_numcmp, %function
op_numcmp:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_numcmp, .-op_numcmp

30
sr_arm/op_pattern.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_pattern
.type op_pattern, %function
op_pattern:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_pattern, .-op_pattern

30
sr_arm/op_restartpc.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_restartpc
.type op_restartpc, %function
op_restartpc:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_restartpc, .-op_restartpc

30
sr_arm/op_retarg.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_retarg
.type op_retarg, %function
op_retarg:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_retarg, .-op_retarg

30
sr_arm/op_sorts_after.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_sorts_after
.type op_sorts_after, %function
op_sorts_after:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_sorts_after, .-op_sorts_after

30
sr_arm/op_startintrrpt.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_startintrrpt
.type op_startintrrpt, %function
op_startintrrpt:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_startintrrpt, .-op_startintrrpt

30
sr_arm/op_sto.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_sto
.type op_sto, %function
op_sto:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_sto, .-op_sto

30
sr_arm/op_zbfetch.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_zbfetch
.type op_zbfetch, %function
op_zbfetch:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_zbfetch, .-op_zbfetch

30
sr_arm/op_zbstart.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_zbstart
.type op_zbstart, %function
op_zbstart:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_zbstart, .-op_zbstart

30
sr_arm/op_zhelp.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_zhelp
.type op_zhelp, %function
op_zhelp:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_zhelp, .-op_zhelp

30
sr_arm/op_zst_fet_over.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_zst_fet_over
.type op_zst_fet_over, %function
op_zst_fet_over:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_zst_fet_over, .-op_zst_fet_over

30
sr_arm/op_zst_st_over.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_zst_st_over
.type op_zst_st_over, %function
op_zst_st_over:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_zst_st_over, .-op_zst_st_over

30
sr_arm/op_zstepfetch.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_zstepfetch
.type op_zstepfetch, %function
op_zstepfetch:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_zstepfetch, .-op_zstepfetch

30
sr_arm/op_zstepstart.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_zstepstart
.type op_zstepstart, %function
op_zstepstart:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_zstepstart, .-op_zstepstart

View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_zstzb_fet_over
.type op_zstzb_fet_over, %function
op_zstzb_fet_over:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_zstzb_fet_over, .-op_zstzb_fet_over

30
sr_arm/op_zstzb_st_over.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_zstzb_st_over
.type op_zstzb_st_over, %function
op_zstzb_st_over:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_zstzb_st_over, .-op_zstzb_st_over

30
sr_arm/op_zstzbfetch.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_zstzbfetch
.type op_zstzbfetch, %function
op_zstzbfetch:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_zstzbfetch, .-op_zstzbfetch

30
sr_arm/op_zstzbstart.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_zstzbstart
.type op_zstzbstart, %function
op_zstzbstart:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_zstzbstart, .-op_zstzbstart

30
sr_arm/opp_break.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global opp_break
.type opp_break, %function
opp_break:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size opp_break, .-opp_break

30
sr_arm/opp_commarg.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global opp_commarg
.type opp_commarg, %function
opp_commarg:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size opp_commarg, .-opp_commarg

30
sr_arm/opp_hardret.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global opp_hardret
.type opp_hardret, %function
opp_hardret:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size opp_hardret, .-opp_hardret

30
sr_arm/opp_inddevparms.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global opp_inddevparms
.type opp_inddevparms, %function
opp_inddevparms:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size opp_inddevparms, .-opp_inddevparms

30
sr_arm/opp_indfnname.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global opp_indfnname
.type opp_indfnname, %function
opp_indfnname:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size opp_indfnname, .-opp_indfnname

30
sr_arm/opp_indfun.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global opp_indfun
.type opp_indfun, %function
opp_indfun:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size opp_indfun, .-opp_indfun

30
sr_arm/opp_indget.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global opp_indget
.type opp_indget, %function
opp_indget:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size opp_indget, .-opp_indget

30
sr_arm/opp_indglvn.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global opp_indglvn
.type opp_indglvn, %function
opp_indglvn:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size opp_indglvn, .-opp_indglvn

30
sr_arm/opp_indincr.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global opp_indincr
.type opp_indincr, %function
opp_indincr:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size opp_indincr, .-opp_indincr

Some files were not shown because too many files have changed in this diff Show More