iSharkFly-Open
/
fis-gtm
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Compare commits

base: iSharkFly-Open:master
Branches Tags
iSharkFly-Open:master
iSharkFly-Open:RaspberryPi
iSharkFly-Open:MinGW
iSharkFly-Open:V60000-raw
iSharkFly-Open:V60000
iSharkFly-Open:gtm_destdir
iSharkFly-Open:cmakeifiedv55
iSharkFly-Open:v55000
iSharkFly-Open:cmakeified
iSharkFly-Open:configured
iSharkFly-Open:v54002B
iSharkFly-Open:RPi-0.1
iSharkFly-Open:5.5-000
..
compare: iSharkFly-Open:RaspberryPi
Branches Tags
iSharkFly-Open:master
iSharkFly-Open:RaspberryPi
iSharkFly-Open:MinGW
iSharkFly-Open:V60000-raw
iSharkFly-Open:V60000
iSharkFly-Open:gtm_destdir
iSharkFly-Open:cmakeifiedv55
iSharkFly-Open:v55000
iSharkFly-Open:cmakeified
iSharkFly-Open:configured
iSharkFly-Open:v54002B
iSharkFly-Open:RPi-0.1
iSharkFly-Open:5.5-000

24 Commits
master ... RaspberryP

Author SHA1 Message Date
Luis Ibanez 75b15be585 Now dispatching to getframe or trans_code. 
Still needs to reverse engineer the test condition.
 2013-01-09 01:50:24 -05:00
Luis Ibanez d8fcd6cdb8 Following dm_start to mum_tstart. 2013-01-09 01:37:39 -05:00
Luis Ibanez 96df9b4710 Started implementing dm_start.c 2013-01-09 01:29:22 -05:00
Luis Ibanez 464e969389 Added two missing ARM assembly stubs. 2012-12-25 18:42:00 -05:00
Luis Ibanez 8ae5a3bf1a Added more ARM assembly stubs. 2012-12-25 16:49:12 -05:00
Luis Ibanez ef6a3005da Adding more ARM assembly stubs. 2012-12-25 16:37:09 -05:00
Luis Ibanez 394dc3222c Adding more ARM assembly stubs. 2012-12-25 16:17:51 -05:00
Luis Ibanez 9f9c04d609 Adding more ARM assembly stubs. 2012-12-25 16:05:18 -05:00
Luis Ibanez 852e9c22b1 Adding more ARM assembly stubs for op_ routines. 2012-12-25 15:48:51 -05:00
Luis Ibanez e6b3ddf829 Adding more ARM assembly stubs. 2012-12-25 15:17:35 -05:00
Luis Ibanez 4166b832c5 Added more ARM assembly stubs. 2012-12-25 15:08:23 -05:00
Luis Ibanez 5f2ef86c7a Added stubs for more ARM assembly files. 2012-12-25 14:49:00 -05:00
Luis Ibanez 78903f8fec Added skeleton to implement compswap. 
The compswap function is implemented in native assembly.
Here we make the first steps to implement the function using the
ARM assembly.
 2012-12-24 19:33:47 -05:00
Luis Ibanez cccb2c7535 Added case for __arm__ copying from i386. 
The code was simply copy pasted at this point.
It needs to be reviewed and fixed in order to match the
actual required behavior in the ARM architecture.
 2012-12-24 18:23:36 -05:00
Luis Ibanez ffbcca706c Added __arm__ as supported non-shared binary. 
Just as we did in sr_unix/gtm_trigger.c
 2012-12-24 17:40:18 -05:00
Luis Ibanez c542303eda Got ARM equivalent of the EIP register. 
The Extended Instruction Pointer EIP, seems to be the equivalent
of the Program Counter PC register in the ARM architecture:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0274b/index.html

The list of ARM registers can be seen in the structure sigcontext
in the file:  /usr/include/arm-linux-gnueabihf/asm/sigcontext.h
 2012-12-24 16:58:16 -05:00
Luis Ibanez 899ab884ca Logic for #defined __arm__ was incorrect. 
It should have been paired with the __i386__ flag.
 2012-12-24 16:18:03 -05:00
Luis Ibanez b4d54aa67d Adding ARM to list of non-shared binary platforms 
By default only the i386 platform is supported for non-shared binaries.
Here we add ARM to the list. Which means that we will have to port to
ARM the implementation of the i386 architecture.
 2012-12-24 16:06:43 -05:00
Luis Ibanez 9c1ea6e8c8 Added case for __arm__ 
The symbol defined by gcc is "__arm__", not "__arm".

This can be seen with the command:  cpp -dM < /dev/null
 2012-12-24 15:57:43 -05:00
Luis Ibanez 94d996f81e Adding option for __arm. 
Remains to be seen if the values inside are appropriate for ARM...
 2012-12-24 15:40:12 -05:00
Luis Ibanez de89d5ae3f Adding .h files from sr_i386. 2012-12-24 15:33:04 -05:00
Luis Ibanez 6c3ea0fea2 Added a branch directory for ARM code. 2012-12-24 15:28:00 -05:00
Luis Ibanez 831df3bc61 Adding ARM to the list of platforms. 
This is only the beggining...
 2012-12-24 15:18:32 -05:00
Amul Shah 0eede9a40b Synchronize with upstream GT.M V6.0-000 
Please refer to the release notes for more information about this
version.
http://tinco.pair.com/bhaskar/gtm/doc/articles/GTM_V6.0-000_Release_Notes.html

This commit includes all files from the x86 and x86_64 source tarballs,
including generated files.
 2012-10-29 18:54:31 -04:00
1054 changed files with 30542 additions and 52010 deletions
Show Stats Expand all files Collapse all files

398
.gitignore vendored
View File

@ -1,398 +0,0 @@
### Gradle ###
.gradle
build/
# Ignore Gradle GUI config
gradle-app.setting
# Avoid ignoring Gradle wrapper jar file (.jar files are usually ignored)
!gradle-wrapper.jar
# Cache of project
.gradletasknamecache
# # Work around https://youtrack.jetbrains.com/issue/IDEA-116898
# gradle/wrapper/gradle-wrapper.properties
### Gradle Patch ###
**/build/
### Intellij ###
# Covers JetBrains IDEs: IntelliJ, RubyMine, PhpStorm, AppCode, PyCharm, CLion, Android Studio and WebStorm
# Reference: https://intellij-support.jetbrains.com/hc/en-us/articles/206544839
# User-specific stuff
.idea/**/workspace.xml
.idea/**/tasks.xml
.idea/**/usage.statistics.xml
.idea/**/dictionaries
.idea/**/shelf
# Generated files
.idea/**/contentModel.xml
# Sensitive or high-churn files
.idea/**/dataSources/
.idea/**/dataSources.ids
.idea/**/dataSources.local.xml
.idea/**/sqlDataSources.xml
.idea/**/dynamic.xml
.idea/**/uiDesigner.xml
.idea/**/dbnavigator.xml
# Gradle
.idea/**/gradle.xml
.idea/**/libraries
# Gradle and Maven with auto-import
# When using Gradle or Maven with auto-import, you should exclude module files,
# since they will be recreated, and may cause churn. Uncomment if using
# auto-import.
# .idea/modules.xml
# .idea/*.iml
# .idea/modules
# *.iml
# *.ipr
# CMake
cmake-build-*/
# Mongo Explorer plugin
.idea/**/mongoSettings.xml
# File-based project format
*.iws
# IntelliJ
out/
# mpeltonen/sbt-idea plugin
.idea_modules/
# JIRA plugin
atlassian-ide-plugin.xml
# Cursive Clojure plugin
.idea/replstate.xml
# Crashlytics plugin (for Android Studio and IntelliJ)
com_crashlytics_export_strings.xml
crashlytics.properties
crashlytics-build.properties
fabric.properties
# Editor-based Rest Client
.idea/httpRequests
# Android studio 3.1+ serialized cache file
.idea/caches/build_file_checksums.ser
### Intellij Patch ###
# Comment Reason: https://github.com/joeblau/gitignore.io/issues/186#issuecomment-215987721
# *.iml
# modules.xml
# .idea/misc.xml
# *.ipr
# Sonarlint plugin
.idea/sonarlint
### Intellij+iml ###
# Covers JetBrains IDEs: IntelliJ, RubyMine, PhpStorm, AppCode, PyCharm, CLion, Android Studio and WebStorm
# Reference: https://intellij-support.jetbrains.com/hc/en-us/articles/206544839
# User-specific stuff
.idea/**/workspace.xml
.idea/**/tasks.xml
.idea/**/usage.statistics.xml
.idea/**/dictionaries
.idea/**/shelf
# Generated files
.idea/**/contentModel.xml
# Sensitive or high-churn files
.idea/**/dataSources/
.idea/**/dataSources.ids
.idea/**/dataSources.local.xml
.idea/**/sqlDataSources.xml
.idea/**/dynamic.xml
.idea/**/uiDesigner.xml
.idea/**/dbnavigator.xml
# Gradle
.idea/**/gradle.xml
.idea/**/libraries
# Gradle and Maven with auto-import
# When using Gradle or Maven with auto-import, you should exclude module files,
# since they will be recreated, and may cause churn. Uncomment if using
# auto-import.
# .idea/modules.xml
# .idea/*.iml
# .idea/modules
# *.iml
# *.ipr
# CMake
cmake-build-*/
# Mongo Explorer plugin
.idea/**/mongoSettings.xml
# File-based project format
*.iws
# IntelliJ
out/
# mpeltonen/sbt-idea plugin
.idea_modules/
# JIRA plugin
atlassian-ide-plugin.xml
# Cursive Clojure plugin
.idea/replstate.xml
# Crashlytics plugin (for Android Studio and IntelliJ)
com_crashlytics_export_strings.xml
crashlytics.properties
crashlytics-build.properties
fabric.properties
# Editor-based Rest Client
.idea/httpRequests
# Android studio 3.1+ serialized cache file
.idea/caches/build_file_checksums.ser
### Intellij+iml Patch ###
# Reason: https://github.com/joeblau/gitignore.io/issues/186#issuecomment-249601023
*.iml
modules.xml
.idea/misc.xml
*.ipr
### Maven ###
target/
pom.xml.tag
pom.xml.releaseBackup
pom.xml.versionsBackup
pom.xml.next
release.properties
dependency-reduced-pom.xml
buildNumber.properties
.mvn/timing.properties
.mvn/wrapper/maven-wrapper.jar
.flattened-pom.xml
# CMake
cmake-build-*/
# Mongo Explorer plugin
.idea/**/mongoSettings.xml
# File-based project format
*.iws
# IntelliJ
out/
# mpeltonen/sbt-idea plugin
.idea_modules/
# JIRA plugin
atlassian-ide-plugin.xml
# Cursive Clojure plugin
.idea/replstate.xml
# Crashlytics plugin (for Android Studio and IntelliJ)
com_crashlytics_export_strings.xml
crashlytics.properties
crashlytics-build.properties
fabric.properties
# Editor-based Rest Client
.idea/httpRequests
# Android studio 3.1+ serialized cache file
.idea/caches/build_file_checksums.ser
### Intellij Patch ###
# Comment Reason: https://github.com/joeblau/gitignore.io/issues/186#issuecomment-215987721
# *.iml
# modules.xml
# .idea/misc.xml
# *.ipr
# Sonarlint plugin
.idea/sonarlint
### Node ###
# Logs
logs
*.log
npm-debug.log*
yarn-debug.log*
yarn-error.log*
lerna-debug.log*
.pnpm-debug.log*
# Diagnostic reports (https://nodejs.org/api/report.html)
report.[0-9]*.[0-9]*.[0-9]*.[0-9]*.json
# Runtime data
pids
*.pid
*.seed
*.pid.lock
# Directory for instrumented libs generated by jscoverage/JSCover
lib-cov
# Coverage directory used by tools like istanbul
coverage
*.lcov
# nyc test coverage
.nyc_output
# Grunt intermediate storage (https://gruntjs.com/creating-plugins#storing-task-files)
.grunt
# Bower dependency directory (https://bower.io/)
bower_components
# node-waf configuration
.lock-wscript
# Compiled binary addons (https://nodejs.org/api/addons.html)
build/Release
# Dependency directories
node_modules/
jspm_packages/
# Snowpack dependency directory (https://snowpack.dev/)
web_modules/
# TypeScript cache
*.tsbuildinfo
# Optional npm cache directory
.npm
# Optional eslint cache
.eslintcache
# Optional stylelint cache
.stylelintcache
# Microbundle cache
.rpt2_cache/
.rts2_cache_cjs/
.rts2_cache_es/
.rts2_cache_umd/
# Optional REPL history
.node_repl_history
# Output of 'npm pack'
*.tgz
# Yarn Integrity file
.yarn-integrity
# dotenv environment variable files
.env
.env.development.local
.env.test.local
.env.production.local
.env.local
# parcel-bundler cache (https://parceljs.org/)
.cache
.parcel-cache
# Next.js build output
.next
out
# Nuxt.js build / generate output
.nuxt
dist
# Gatsby files
.cache/
# Comment in the public line in if your project uses Gatsby and not Next.js
# https://nextjs.org/blog/next-9-1#public-directory-support
# public
# vuepress build output
.vuepress/dist
# vuepress v2.x temp and cache directory
.temp
# Docusaurus cache and generated files
.docusaurus
# Serverless directories
.serverless/
# FuseBox cache
.fusebox/
# DynamoDB Local files
.dynamodb/
# TernJS port file
.tern-port
# Stores VSCode versions used for testing VSCode extensions
.vscode-test
# yarn v2
.yarn/cache
.yarn/unplugged
.yarn/build-state.yml
.yarn/install-state.gz
.pnp.*
### Node Patch ###
# Serverless Webpack directories
.webpack/
# Optional stylelint cache
# SvelteKit build / generate output
.svelte-kit
### yarn ###
.yarn/*
!.yarn/releases
!.yarn/patches
!.yarn/plugins
!.yarn/sdks
!.yarn/versions
# if you are NOT using Zero-installs, then:
# comment the following lines
!.yarn/cache
# and uncomment the following lines
# .pnp.*
### CVS ###
/CVS/*
**/CVS/*
.cvsignore
*/.cvsignore

343
CMakeLists.txt
View File

@ -1,6 +1,6 @@
#################################################################
# #
# Copyright 2012, 2013 Fidelity Information Services, Inc #
# Copyright 2012 Fidelity Information Services, Inc #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
@ -15,63 +15,19 @@
cmake_minimum_required(VERSION 2.8.5)
project(GTM C ASM)
# Max optimization level is -O2
get_property(languages GLOBAL PROPERTY ENABLED_LANGUAGES)
foreach(lang ${languages})
get_property(flags CACHE CMAKE_${lang}_FLAGS_RELEASE PROPERTY VALUE)
if("${flags}" MATCHES "-O[3-9]")
string(REGEX REPLACE "-O[3-9]" "-O2" flags "${flags}")
set_property(CACHE CMAKE_${lang}_FLAGS_RELEASE PROPERTY VALUE "${flags}")
endif()
endforeach()
# Defaults
set(version V6.0-003)
if("${version}" STREQUAL "")
set(version V9.9-0)
set(version V6.0-000)
if("${version}" EQUAL "")
set(version V9.9-0)
endif()
# If CMAKE_BUILD_TYPE is not defined make it a Release build
if(NOT CMAKE_CONFIGURATION_TYPES AND NOT CMAKE_BUILD_TYPE)
set(CMAKE_BUILD_TYPE Release CACHE STRING "Build type" FORCE)
endif()
# If it's a debug build make sure GT.M uses all of its debug options
set(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG} -DDEBUG")
set(install_permissions_script
OWNER_READ OWNER_EXECUTE OWNER_WRITE
GROUP_READ GROUP_EXECUTE
WORLD_READ WORLD_EXECUTE
)
set_property(DIRECTORY APPEND PROPERTY COMPILE_DEFINITIONS_DEBUG DEBUG)
# Only IA64 and x86_64 architectures use this option
set(gen_xfer_desc 0)
# Platform specific libs
set(gtm_osarch_libs "")
# Define these ahead of establishing platforms
set(gt_src_list)
set(sources_used "")
set(extralibs "")
set(is_encryption_supported 1)
set(libmumpsrestoreregex "")
message("--> OS = ${CMAKE_SYSTEM_NAME} / ARCH = ${CMAKE_SYSTEM_PROCESSOR}")
# Establish platform
# Except for Solaris, CMAKE_COMPILER_IS_GNUCC is true
if("${CMAKE_SYSTEM_NAME}" MATCHES "Linux")
include(sr_linux/platform.cmake)
elseif("${CMAKE_SYSTEM_NAME}" MATCHES "HP-UX")
include(sr_hpux/platform.cmake)
elseif("${CMAKE_SYSTEM_NAME}" MATCHES "AIX")
include(sr_aix/platform.cmake)
elseif("${CMAKE_SYSTEM_NAME}" MATCHES "SunOS")
include(sr_sun/platform.cmake)
if("${CMAKE_SIZEOF_VOID_P}" EQUAL 4)
set(arch "x86")
else()
message(FATAL_ERROR "--> OS = ${CMAKE_SYSTEM_NAME} / ARCH = ${CMAKE_SYSTEM_PROCESSOR}")
set(arch "x86_64")
endif()
option(BUILD_FOR_ARM "Build for the ARM Architecture" OFF)
if(BUILD_FOR_ARM)
set(arch "arm")
endif()
# Choose where to get bootstrap sources.
@ -97,6 +53,41 @@ if(NOT GTM_INSTALL_DIR)
set(GTM_INSTALL_DIR .)
endif()
# Max optimization level is -O2
get_property(languages GLOBAL PROPERTY ENABLED_LANGUAGES)
foreach(lang ${languages})
get_property(flags CACHE CMAKE_${lang}_FLAGS_RELEASE PROPERTY VALUE)
if("${flags}" MATCHES "-O[3-9]")
string(REGEX REPLACE "-O[3-9]" "-O2" flags "${flags}")
set_property(CACHE CMAKE_${lang}_FLAGS_RELEASE PROPERTY VALUE "${flags}")
endif()
endforeach()
if(NOT CMAKE_CONFIGURATION_TYPES AND NOT CMAKE_BUILD_TYPE)
set(CMAKE_BUILD_TYPE Release CACHE STRING "Build type" FORCE)
endif()
set(install_permissions_script
OWNER_READ OWNER_EXECUTE OWNER_WRITE
GROUP_READ GROUP_EXECUTE
WORLD_READ WORLD_EXECUTE
)
set(CMAKE_INCLUDE_FLAG_ASM "-Wa,-I") # gcc -I does not make it to "as"
set(CMAKE_C_FLAGS
# TODO: Use CMake 2.8.9 POSITION_INDEPENDENT_CODE abstraction for -fPIC in static libs
"${CMAKE_C_FLAGS} -ansi -fsigned-char -fPIC -Wmissing-prototypes")
set(CMAKE_C_FLAGS_RELEASE
"${CMAKE_C_FLAGS_RELEASE} -fno-defer-pop -fno-strict-aliasing -ffloat-store")
add_definitions(
#-DNOLIBGTMSHR #gt_cc_option_DBTABLD=-DNOLIBGTMSHR
-D_GNU_SOURCE
-D_FILE_OFFSET_BITS=64
-D_XOPEN_SOURCE=600
-D_LARGEFILE64_SOURCE
)
set_property(DIRECTORY APPEND PROPERTY COMPILE_DEFINITIONS_DEBUG DEBUG)
#-----------------------------------------------------------------------------
# Source files are organized into subdirectories named by platform.
@ -105,6 +96,21 @@ endif()
# appear in multiple directories but only the instance found earliest
# in the search path will be used. Later instances of the same source
# file name will be ignored.
set(gt_src_list)
set(gen_xfer_desc 0)
if("${CMAKE_SYSTEM_NAME}" MATCHES "Linux")
list(APPEND gt_src_list sr_linux)
if("${CMAKE_SIZEOF_VOID_P}" EQUAL 4)
if(BUILD_FOR_ARM)
list(APPEND gt_src_list sr_arm sr_x86_regs sr_unix_nsb)
else()
list(APPEND gt_src_list sr_i386 sr_x86_regs sr_unix_nsb)
endif()
else()
list(APPEND gt_src_list sr_x86_64 sr_x86_regs)
set(gen_xfer_desc 1)
endif()
endif()
list(APPEND gt_src_list
sr_unix_gnp
sr_unix_cm
@ -119,7 +125,7 @@ list(APPEND gt_src_list
foreach(d ${gt_src_list})
set(source_dir_${d} ${GTM_SOURCE_DIR}/${d})
file(GLOB sources_${d} RELATIVE ${source_dir_${d}}
${d}/*.c ${d}/*.s ${d}/*.si)
${d}/*.c ${d}/*.s ${d}/*.si)
endforeach()
if(gen_bootstrap)
# Prefer generated sources over all other locations.
@ -159,20 +165,15 @@ endfunction()
# Macro to search directories ordered by 'gt_src_list' for a given
# list of source file names, assign them to a target, and exclude the
# source file names from inclusion in libmumps.
set(sources_used "")
macro(set_source_list target)
foreach(name ${ARGN})
set(src "")
foreach(d ${gt_src_list})
if(";${sources_${d}};" MATCHES ";(${name}\\.(c|s|si));")
set(fname ${CMAKE_MATCH_1})
set(src ${d}/${fname})
set("source_used_${fname}" 1)
list(APPEND sources_used ${source_dir_${d}}/${fname})
if(NOT "${libmumpsrestoreregex}" STREQUAL "")
if(";${name};" MATCHES ";(${libmumpsrestoreregex});")
set("source_used_${fname}" 0)
endif()
endif()
set(src ${d}/${CMAKE_MATCH_1})
set("source_used_${CMAKE_MATCH_1}" 1)
list(APPEND sources_used ${source_dir_${d}}/${CMAKE_MATCH_1})
break()
endif()
endforeach()
@ -203,9 +204,6 @@ load_source_list(libgtcm sr_unix_cm/libgtcm.list)
load_source_list(liblke sr_unix/liblke.list)
load_source_list(libmupip sr_unix/libmupip.list)
load_source_list(libstub sr_unix/libstub.list)
if("${CMAKE_SYSTEM_NAME}" STREQUAL "SunOS")
load_source_list(libgtmrpc sr_sun/libgtmrpc.list)
endif()
# Assign sources to executables.
set_source_list(gtm_threadgbl_deftypes gtm_threadgbl_deftypes)
@ -227,9 +225,6 @@ set_source_list(maskpass maskpass)
set_source_list(mumps gtm)
set_source_list(mupip mupip mupip_cmd)
set_source_list(semstat2 semstat2)
if("${CMAKE_SYSTEM_NAME}" STREQUAL "SunOS")
set_source_list(gtm_svc gtm_svc gtm_rpc_init gtm_dal_svc)
endif()
#-----------------------------------------------------------------------------
# libmumps gets leftover sources, so compute the remaining list.
@ -324,7 +319,6 @@ if(gen_xfer_desc)
${GTM_BINARY_DIR}/sources.list
COMMAND ${CMAKE_COMMAND}
-D CMAKE_C_COMPILER=${CMAKE_C_COMPILER}
-D "arch=${arch}"
-D "includes=${includes}"
-P ${GTM_SOURCE_DIR}/sr_unix/gen_xfer_desc.cmake
VERBATIM
@ -375,7 +369,6 @@ foreach(lib
mupip
stub
mumps
${extralibs}
)
add_library(lib${lib} STATIC ${lib${lib}_SOURCES})
set_property(TARGET lib${lib} PROPERTY OUTPUT_NAME ${lib})
@ -383,72 +376,61 @@ foreach(lib
endforeach()
# TODO: find_package or find_library for system libs?
include_directories ("/usr/local/include")
target_link_libraries(libmumps ${libmumpslibs})
target_link_libraries(libmumps -lelf -lncurses -lm -ldl -lpthread -lrt)
add_executable(mumps ${mumps_SOURCES})
target_link_libraries(mumps libmumps)
add_executable(mumps ${mumps_SOURCES})
target_link_libraries(mumps libmumps)
add_executable(dse ${dse_SOURCES})
target_link_libraries(dse libdse libmumps libstub)
add_executable(dse ${dse_SOURCES})
target_link_libraries(dse libdse libmumps libstub)
list(APPEND with_export dse)
add_executable(dbcertify ${dbcertify_SOURCES})
target_link_libraries(dbcertify libdbcertify libmupip libmumps libstub)
add_executable(dbcertify ${dbcertify_SOURCES})
target_link_libraries(dbcertify libdbcertify libmupip libmumps libstub)
add_executable(geteuid ${geteuid_SOURCES})
add_executable(geteuid ${geteuid_SOURCES})
add_executable(gtmsecshr ${gtmsecshr_SOURCES})
add_dependencies(gtmsecshr gen_gtm_threadgbl_deftypes)
add_executable(gtmsecshr ${gtmsecshr_SOURCES})
add_dependencies(gtmsecshr gen_gtm_threadgbl_deftypes)
add_executable(gtmsecshr_real ${gtmsecshr_real_SOURCES})
add_executable(gtmsecshr_real ${gtmsecshr_real_SOURCES})
target_link_libraries(gtmsecshr_real libmumps)
set_target_properties(gtmsecshr_real PROPERTIES
OUTPUT_NAME gtmsecshr
RUNTIME_OUTPUT_DIRECTORY ${GTM_BINARY_DIR}/gtmsecshrdir
)
add_dependencies(gtmsecshr_real gen_gtm_threadgbl_deftypes)
add_dependencies(gtmsecshr_real gen_gtm_threadgbl_deftypes)
add_executable(mupip ${mupip_SOURCES})
target_link_libraries(mupip libmupip libmumps libstub)
add_executable(mupip ${mupip_SOURCES})
target_link_libraries(mupip libmupip libmumps libstub)
list(APPEND with_export mupip)
add_executable(lke ${lke_SOURCES})
target_link_libraries(lke liblke libmumps libgnpclient libmumps libgnpclient libcmisockettcp)
list(APPEND with_export lke)
add_executable(lke ${lke_SOURCES})
target_link_libraries(lke liblke libmumps libgnpclient libmumps libgnpclient libcmisockettcp)
add_executable(gtcm_server ${gtcm_server_SOURCES})
target_link_libraries(gtcm_server libgtcm libmumps libstub)
add_executable(gtcm_server ${gtcm_server_SOURCES})
target_link_libraries(gtcm_server libgtcm libmumps libstub)
list(APPEND with_export gtcm_server)
add_executable(gtcm_gnp_server ${gtcm_gnp_server_SOURCES})
target_link_libraries(gtcm_gnp_server libgnpserver liblke libmumps libcmisockettcp libstub)
add_executable(gtcm_gnp_server ${gtcm_gnp_server_SOURCES})
target_link_libraries(gtcm_gnp_server libgnpserver liblke libmumps libcmisockettcp libstub)
list(APPEND with_export gtcm_gnp_server)
add_executable(gtcm_play ${gtcm_play_SOURCES})
target_link_libraries(gtcm_play libgtcm libmumps libstub)
add_executable(gtcm_play ${gtcm_play_SOURCES})
target_link_libraries(gtcm_play libgtcm libmumps libstub)
list(APPEND with_export gtcm_play)
add_executable(gtcm_pkdisp ${gtcm_pkdisp_SOURCES})
target_link_libraries(gtcm_pkdisp libgtcm libmumps libstub)
add_executable(gtcm_pkdisp ${gtcm_pkdisp_SOURCES})
target_link_libraries(gtcm_pkdisp libgtcm libmumps libstub)
add_executable(gtcm_shmclean ${gtcm_shmclean_SOURCES})
target_link_libraries(gtcm_shmclean libgtcm libmumps libstub)
add_executable(semstat2 ${semstat2_SOURCES})
add_executable(ftok ${ftok_SOURCES})
target_link_libraries(ftok libmumps libstub)
add_executable(gtcm_shmclean ${gtcm_shmclean_SOURCES})
target_link_libraries(gtcm_shmclean libgtcm libmumps libstub)
add_executable(semstat2 ${semstat2_SOURCES})
add_executable(ftok ${ftok_SOURCES})
target_link_libraries(ftok libmumps libstub)
if("${CMAKE_SYSTEM_NAME}" STREQUAL "SunOS")
add_executable(gtm_svc ${gtm_svc_SOURCES})
target_link_libraries(gtm_svc libmumps libgnpclient libcmisockettcp libgtmrpc)
endif()
foreach(t ${with_export})
set_target_properties(${t} PROPERTIES
LINK_FLAGS "${gtm_link}"
LINK_DEPENDS "${gtm_dep}"
LINK_FLAGS "-Wl,-u,gtm_filename_to_id -Wl,-u,gtm_zstatus -Wl,--version-script,\"${GTM_BINARY_DIR}/gtmexe_symbols.export\""
LINK_DEPENDS "${GTM_BINARY_DIR}/gtmexe_symbols.export"
)
add_dependencies(${t} gen_export)
endforeach()
@ -457,81 +439,68 @@ add_library(libgtmshr MODULE ${libgtmshr_SOURCES})
set_property(TARGET libgtmshr PROPERTY OUTPUT_NAME gtmshr)
target_link_libraries(libgtmshr libmumps libgnpclient libcmisockettcp)
set_target_properties(libgtmshr PROPERTIES
LINK_FLAGS "${libgtmshr_link}"
LINK_DEPENDS "${libgtmshr_dep}"
LINK_FLAGS "-Wl,-u,gtm_ci -Wl,-u,gtm_filename_to_id -Wl,--version-script,\"${GTM_BINARY_DIR}/gtmshr_symbols.export\""
LINK_DEPENDS "${GTM_BINARY_DIR}/gtmshr_symbols.export"
)
add_dependencies(libgtmshr gen_export)
add_dependencies(mumps libgtmshr)
if(is_encryption_supported)
# Iterate over the list of GPG related libraries
foreach(gpglib gpg-error gpgme gcrypt)
# For each library, we need a new CMake variable, hence GPGLIB_${gpglib}
find_library(GPGLIB_${gpglib} NAME ${gpglib} PATHS ${CMAKE_LIBRARY_PATH})
# Append the found library to the list
set(GPG_LIBRARIES ${GPG_LIBRARIES} ${GPGLIB_${gpglib}})
endforeach()
add_library(libgtmcrypt MODULE ${libgtmcrypt_SOURCES})
set_target_properties(libgtmcrypt PROPERTIES
OUTPUT_NAME gtmcrypt
COMPILE_DEFINITIONS USE_GCRYPT
LIBRARY_OUTPUT_DIRECTORY ${GTM_BINARY_DIR}/plugin
)
target_link_libraries(libgtmcrypt gpg-error gpgme gcrypt)
install(TARGETS libgtmcrypt DESTINATION ${GTM_INSTALL_DIR}/plugin)
add_library(libgtmcrypt MODULE ${libgtmcrypt_SOURCES})
set_target_properties(libgtmcrypt PROPERTIES
OUTPUT_NAME gtmcrypt
COMPILE_DEFINITIONS "USE_GCRYPT -DUSE_AES256CFB"
LIBRARY_OUTPUT_DIRECTORY ${GTM_BINARY_DIR}/plugin
add_executable(maskpass ${maskpass_SOURCES})
target_link_libraries(maskpass gpg-error gpgme gcrypt)
set_target_properties(maskpass PROPERTIES
COMPILE_DEFINITIONS USE_GCRYPT
RUNTIME_OUTPUT_DIRECTORY ${GTM_BINARY_DIR}/plugin/gtmcrypt
)
install(TARGETS maskpass DESTINATION ${GTM_INSTALL_DIR}/plugin/gtmcrypt)
foreach(f
add_db_key.sh
build.sh
encrypt_sign_db_key.sh
gen_keypair.sh
gen_sym_hash.sh
gen_sym_key.sh
gtmcrypt.tab
gtmcrypt_dbk_ref.c
gtmcrypt_dbk_ref.h
gtmcrypt_interface.h
gtmcrypt_pk_ref.c
gtmcrypt_pk_ref.h
gtmcrypt_ref.c
gtmcrypt_ref.h
gtmcrypt_sym_ref.h
gtmxc_types.h
import_and_sign_key.sh
install.sh
maskpass.c
pinentry-gtm.sh
pinentry.m
pinentry.m
)
target_link_libraries(libgtmcrypt ${GPG_LIBRARIES})
install(TARGETS libgtmcrypt DESTINATION ${GTM_INSTALL_DIR}/plugin)
add_executable(maskpass ${maskpass_SOURCES})
target_link_libraries(maskpass ${GPG_LIBRARIES})
set_target_properties(maskpass PROPERTIES
COMPILE_DEFINITIONS USE_GCRYPT
RUNTIME_OUTPUT_DIRECTORY ${GTM_BINARY_DIR}/plugin/gtmcrypt
set(f_in "${GTM_SOURCE_DIR}/sr_unix/${f}")
set(f_out "${GTM_BINARY_DIR}/plugin/gtmcrypt/${f}")
add_custom_command(
OUTPUT "${f_out}"
DEPENDS "${f_in}"
COMMAND ${CMAKE_COMMAND} -E copy "${f_in}" "${f_out}"
)
install(TARGETS maskpass DESTINATION ${GTM_INSTALL_DIR}/plugin/gtmcrypt)
foreach(f
add_db_key.sh
build.sh
encrypt_sign_db_key.sh
gen_keypair.sh
gen_sym_hash.sh
gen_sym_key.sh
gtmcrypt.tab
gtmcrypt_dbk_ref.c
gtmcrypt_dbk_ref.h
gtmcrypt_interface.h
gtmcrypt_pk_ref.c
gtmcrypt_pk_ref.h
gtmcrypt_dbk_ref.c
gtmcrypt_dbk_ref.h
gtmcrypt_ref.c
gtmcrypt_ref.h
gtmcrypt_sym_ref.h
gtmxc_types.h
import_and_sign_key.sh
install.sh
maskpass.c
pinentry-gtm.sh
pinentry.m
pinentry.m
show_install_config.sh
)
set(f_in "${GTM_SOURCE_DIR}/sr_unix/${f}")
set(f_out "${GTM_BINARY_DIR}/plugin/gtmcrypt/${f}")
add_custom_command(
OUTPUT "${f_out}"
DEPENDS "${f_in}"
COMMAND ${CMAKE_COMMAND} -E copy "${f_in}" "${f_out}"
)
if("${f}" MATCHES "\\.sh$")
set(permissions PERMISSIONS ${install_permissions_script})
else()
set(permissions "")
endif()
install(FILES "${f_out}" DESTINATION ${GTM_INSTALL_DIR}/plugin/gtmcrypt ${permissions})
list(APPEND files_to_place "${f_out}")
endforeach()
endif()
if("${f}" MATCHES "\\.sh$")
set(permissions PERMISSIONS ${install_permissions_script})
else()
set(permissions "")
endif()
install(FILES "${f_out}" DESTINATION ${GTM_INSTALL_DIR}/plugin/gtmcrypt ${permissions})
list(APPEND files_to_place "${f_out}")
endforeach()
install(TARGETS
mumps
@ -646,7 +615,6 @@ foreach(f
lke.hlp
mumps.hlp
mupip.hlp
custom_errors_sample.txt
)
select_file(src ${f})
list(APPEND files ${src})
@ -717,10 +685,7 @@ endforeach()
#-----------------------------------------------------------------------------
set(gtm_hlp mumps.hlp)
set(gde_hlp gde.hlp)
set(mupip_hlp mupip.hlp)
set(dse_hlp dse.hlp)
set(lke_hlp lke.hlp)
foreach(help gtm gde mupip dse lke)
foreach(help gtm gde)
set(CMAKE_CONFIGURABLE_FILE_CONTENT
"Change -segment DEFAULT -block=2048 -file=\$gtm_dist/${help}help.dat
Change -region DEFAULT -record=1020 -key=255

0
COPYING Executable file → Normal file
View File

15
CVS/Entries
View File

@ -1,15 +0,0 @@
/CMakeLists.txt/1.6/Wed Oct 23 03:49:20 2013//
/COPYING/1.6/Fri Nov 2 03:00:12 2012//
/README/1.21/Wed Oct 23 03:49:20 2013//
D/sr_alpha////
D/sr_i386////
D/sr_linux////
D/sr_port////
D/sr_port_cm////
D/sr_unix////
D/sr_unix_cm////
D/sr_unix_gnp////
D/sr_unix_nsb////
D/sr_vvms////
D/sr_x86_64////
D/sr_x86_regs////

15
CVS/Entries.Extra
View File

@ -1,15 +0,0 @@
/CMakeLists.txt////*////
/COPYING////*////
/README////*////
D/sr_alpha////////
D/sr_i386////////
D/sr_linux////////
D/sr_port////////
D/sr_port_cm////////
D/sr_unix////////
D/sr_unix_cm////////
D/sr_unix_gnp////////
D/sr_unix_nsb////////
D/sr_vvms////////
D/sr_x86_64////////
D/sr_x86_regs////////

3
CVS/Entries.Extra.Old
View File

@ -1,3 +0,0 @@
/CMakeLists.txt////*////
/COPYING////*////
/README////*////

4
CVS/Entries.Old
View File

@ -1,4 +0,0 @@
/CMakeLists.txt/1.6/Wed Oct 23 03:49:20 2013//
/COPYING/1.6/Fri Nov 2 03:00:12 2012//
/README/1.21/Wed Oct 23 03:49:20 2013//
D

1
CVS/Repository
View File

@ -1 +0,0 @@
gtm

1
CVS/Root
View File

@ -1 +0,0 @@
:pserver:anonymous@fis-gtm.cvs.sourceforge.net:/cvsroot/fis-gtm

69
README Executable file → Normal file
View File

@ -1,6 +1,6 @@
All software in this package is part of FIS GT.M (http://fis-gtm.com)
which is Copyright 2013 Fidelity Information Services, Inc., and
provided to you under the terms of a license. If there is a COPYING
All software in this package is part of FIS GT.M (http://fis-gtm.com)
which is Copyright 2012 Fidelity Information Services, Inc., and
provided to you under the terms of a license. If there is a COPYING
file included in this package, it contains the terms of the license under
which the package is provided to you. If there is not a COPYING file in
the package, you must ensure that your use of FIS GT.M complies with the
@ -22,68 +22,49 @@ To build GT.M for Linux, do the following steps:
Install developement libraries libelf, zlib, libicu, libgpgme, libgpg-error,
libgcrypt.
Ensure that your locale settings are correct, otherwise you will see
GTM-E-NONUTF8LOCALE messages. Refer the Messages and Recovery Procedures
Manual if you do encounter these messages.
[optional] The GT.M source tarball includes pre-generated files. To generate
these files requires a binary distribution of GT.M. You can download GT.M
from http://sourceforge.net/projects/fis-gtm/ Unpack the tar file and run
the configure script as root. Note: the tar file unpacks everything into
your current working directory, not a new subdirectory. The Linux Standard
Base (LSB) install path for GT.M V6.0-003 is /opt/fis-gtm/V6.0-003_i686 or
/opt/fis-gtm/V6.0-003_x8664. These instrcutions are written using x8664, please
use i686 as necessary.
$ tar xfz gtm_V60003_linux_x8664_pro.tar.gz
# Note down the installation path for use with cmake below
Base (LSB) install path for GT.M V60000 is /opt/lsb-gtm/V6.0-000_i686 or
/opt/lsb-gtm/V6.0-000_x8664.
$ tar xfz gtm_V60000_linux_i686_pro.tar.gz
$ sudo sh ./configure
2. Unpack the GT.M sources
The GT.M source tarball extracts to a directory with the version number in
the name, fis-gtm-V6.0-003
$ tar xfz fis-gtm-V6.0-003.tar.gz
$ cd fis-gtm-V6.0-003
# Provide the directory path to cmake using
# -D GTM_DIST:PATH=$gtm_dist
You should find this README, LICENSE, COPYING and CMakeLists.txt file and
sr_* source directories.
2. Unpack the GT.M sources
Change directory in the directory that you will place the GT.M source,
here after referred to as <gtm-directory>.
$ mkdir <gtm-directory>
$ cd <gtm-directory>
$ tar xfz gtm_V60000_linux_i686_src.tar.gz
You should find this README, COPYING and CMakeLitst.txt file and sr_* source
directories.
3. Building GT.M -
<fis-gtm-build> can be a sub directory of the source directory,
fis-gtm-V6.0-003, or any other valid path.
<gtm-builddir> can be a sub directory of the source directory <gtm-directory>
$ mkdir <gtm-builddir>
$ cd <gtm-builddir>
$ cmake <gtm-directory>
$ mkdir <fis-gtm-build>
$ cd <fis-gtm-build>
# [optional] If you installed GT.M, provide the directory path to cmake
# -D GTM_DIST:PATH=$gtm_dist
#
# By default the build produces release versions of GT.M. To build a debug
# version of GT.M supply the following parameter to cmake
# -D CMAKE_BUILD_TYPE=DEBUG
#
# Note that the cmake install does not create the final installed GT.M.
# Instead, it stages GT.M for distribution. Change the CMAKE_INSTALL_PREFIX
# to place the staged files in a local directory. To install GT.M, you must
# cd to that installed directory and execute the configure script.
# Note that the default install location is driven by CMAKE_INSTALL_PREFIX.
# You can change this when executing cmake
# -D CMAKE_INSTALL_PREFIX:PATH=/opt/lsb-gtm
#
# -D CMAKE_INSTALL_PREFIX:PATH=${PWD}/package
#
$ cmake <path to>/fis-gtm-V6.0-003 -D CMAKE_INSTALL_PREFIX:PATH=${PWD}/package
$ make
$ make install
$ cd package/lib/fis-gtm/V6.0-003_x86_64
# Now you are ready to install GT.M. Answer a few questions and install it.
# The recommended installation path is /opt/fis-gtm/V6.0-003_x86_64
$ sudo ./configure
$ make clean
4. Packaging GT.M -

22
sr_alpha/CVS/Entries
View File

@ -1,22 +0,0 @@
/axp.h/1.1/Wed Oct 23 03:49:21 2013//
/cacheflush.m64/1.1/Wed Oct 23 03:49:21 2013//
/double2s.c/1.1/Wed Oct 23 03:49:21 2013//
/emit_code_sp.c/1.1/Wed Oct 23 03:49:21 2013//
/emit_code_sp.h/1.1/Wed Oct 23 03:49:21 2013//
/follow.m64/1.1/Wed Oct 23 03:49:21 2013//
/gtm_dump.c/1.1/Wed Oct 23 03:49:21 2013//
/inst_flush.m64/1.1/Wed Oct 23 03:49:21 2013//
/mint2mval.m64/1.1/Wed Oct 23 03:49:21 2013//
/movq.m64/1.1/Wed Oct 23 03:49:21 2013//
/mval2bool.m64/1.1/Wed Oct 23 03:49:21 2013//
/mval2mint.m64/1.1/Wed Oct 23 03:49:21 2013//
/objlangdefs.h/1.1/Wed Oct 23 03:49:21 2013//
/op_call.m64/1.1/Wed Oct 23 03:49:21 2013//
/op_equnul.m64/1.1/Wed Oct 23 03:49:21 2013//
/op_forlcldo.m64/1.1/Wed Oct 23 03:49:21 2013//
/op_linestart.m64/1.1/Wed Oct 23 03:49:21 2013//
/op_pattern.m64/1.1/Wed Oct 23 03:49:21 2013//
/op_sorts_after.m64/1.1/Wed Oct 23 03:49:21 2013//
/pseudo_ret.m64/1.1/Wed Oct 23 03:49:21 2013//
/zbreaksp.h/1.1/Wed Oct 23 03:49:21 2013//
D

21
sr_alpha/CVS/Entries.Extra
View File

@ -1,21 +0,0 @@
/axp.h////*////
/cacheflush.m64////*////
/double2s.c////*////
/emit_code_sp.c////*////
/emit_code_sp.h////*////
/follow.m64////*////
/gtm_dump.c////*////
/inst_flush.m64////*////
/mint2mval.m64////*////
/movq.m64////*////
/mval2bool.m64////*////
/mval2mint.m64////*////
/objlangdefs.h////*////
/op_call.m64////*////
/op_equnul.m64////*////
/op_forlcldo.m64////*////
/op_linestart.m64////*////
/op_pattern.m64////*////
/op_sorts_after.m64////*////
/pseudo_ret.m64////*////
/zbreaksp.h////*////

0
sr_alpha/CVS/Entries.Extra.Old
View File

0
sr_alpha/CVS/Entries.Old
View File

1
sr_alpha/CVS/Repository
View File

@ -1 +0,0 @@
gtm/sr_alpha

1
sr_alpha/CVS/Root
View File

@ -1 +0,0 @@
:pserver:anonymous@fis-gtm.cvs.sourceforge.net:/cvsroot/fis-gtm

133
sr_alpha/axp.h
View File

@ -1,133 +0,0 @@
/****************************************************************
* *
* Copyright 2001, 2002 Sanchez Computer Associates, Inc. *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
/* axp.h - AXP machine instruction information.
*
* Requires "axp_registers.h" and "axp_gtm_registers.h".
*
*/
/* Machine instruction templates. */
#define ALPHA_INS_ADDL ((unsigned)0x10 << ALPHA_SHIFT_OP)
#define ALPHA_INS_BEQ ((unsigned)0x39 << ALPHA_SHIFT_OP)
#define ALPHA_INS_BGE ((unsigned)0x3e << ALPHA_SHIFT_OP)
#define ALPHA_INS_BGT ((unsigned)0x3f << ALPHA_SHIFT_OP)
#define ALPHA_INS_BIS ((unsigned)0x11 << ALPHA_SHIFT_OP | 0x20 << ALPHA_SHIFT_FUNC)
#define ALPHA_INS_BLE ((unsigned)0x3b << ALPHA_SHIFT_OP)
#define ALPHA_INS_BLT ((unsigned)0x3a << ALPHA_SHIFT_OP)
#define ALPHA_INS_BLBC ((unsigned)0x38 << ALPHA_SHIFT_OP)
#define ALPHA_INS_BLBS ((unsigned)0x3c << ALPHA_SHIFT_OP)
#define ALPHA_INS_BNE ((unsigned)0x3d << ALPHA_SHIFT_OP)
#define ALPHA_INS_BSR ((unsigned)0x34 << ALPHA_SHIFT_OP)
#define ALPHA_INS_BR ((unsigned)0x30 << ALPHA_SHIFT_OP)
#define ALPHA_INS_JMP ((unsigned)0x1a << ALPHA_SHIFT_OP)
#define ALPHA_INS_JSR ((unsigned)0x1a << ALPHA_SHIFT_OP | 1 << ALPHA_SHIFT_BRANCH_FUNC)
#define ALPHA_INS_LDA ((unsigned)0x08 << ALPHA_SHIFT_OP)
#define ALPHA_INS_LDAH ((unsigned)0x09 << ALPHA_SHIFT_OP)
#define ALPHA_INS_LDL ((unsigned)0x28 << ALPHA_SHIFT_OP)
#define ALPHA_INS_LDQ ((unsigned)0x29 << ALPHA_SHIFT_OP)
#define ALPHA_INS_RET ((unsigned)0x1a << ALPHA_SHIFT_OP | 2 << ALPHA_SHIFT_BRANCH_FUNC)
#define ALPHA_INS_STL ((unsigned)0x2c << ALPHA_SHIFT_OP)
#define ALPHA_INS_STQ ((unsigned)0x2d << ALPHA_SHIFT_OP)
#define ALPHA_INS_SUBL ((unsigned)0x10 << ALPHA_SHIFT_OP | 0x9 << ALPHA_SHIFT_FUNC)
#define ALPHA_INS_SUBQ ((unsigned)0x10 << ALPHA_SHIFT_OP | 0x29 << ALPHA_SHIFT_FUNC)
/* Bit offsets to instruction fields. */
#define ALPHA_SHIFT_OP 26
#define ALPHA_SHIFT_BRANCH_FUNC 14
#define ALPHA_SHIFT_FUNC 5
#define ALPHA_SHIFT_LITERAL 13
#define ALPHA_SHIFT_RA 21
#define ALPHA_SHIFT_RB 16
#define ALPHA_SHIFT_RC 0
#define ALPHA_SHIFT_BRANCH_DISP 0
#define ALPHA_SHIFT_DISP 0
/* Bit masks for instruction fields. */
#define ALPHA_BIT_LITERAL (1 << 12)
#define ALPHA_MASK_BRANCH_DISP 0x1fffff
#define ALPHA_MASK_BRANCH_FUNC 0xc00000
#define ALPHA_MASK_DISP 0xffff
#define ALPHA_MASK_FUNC 0x7f
#define ALPHA_MASK_LITERAL 0xff
#define ALPHA_MASK_OP 0x3f
#define ALPHA_MASK_REG 0x1f
/* Alternative assembler mnemonics for machine instruction. */
#define ALPHA_INS_CLRQ (ALPHA_INS_BIS \
| (ALPHA_REG_ZERO << ALPHA_SHIFT_RA) \
| (ALPHA_REG_ZERO << ALPHA_SHIFT_RB))
#define ALPHA_INS_LPC (ALPHA_INS_BR \
| (GTM_REG_CODEGEN_TEMP << ALPHA_SHIFT_RA))
#define ALPHA_INS_MOVE (ALPHA_INS_BIS \
| ALPHA_REG_ZERO << ALPHA_SHIFT_RB)
#define ALPHA_INS_NOP (ALPHA_INS_BIS \
| (ALPHA_REG_ZERO << ALPHA_SHIFT_RA) \
| (ALPHA_REG_ZERO << ALPHA_SHIFT_RB) \
| (ALPHA_REG_ZERO << ALPHA_SHIFT_RC))
/* Construction forms. */
#define ALPHA_BRA(op,ra,disp) ((op) | ((ra) << ALPHA_SHIFT_RA) | (disp)&ALPHA_MASK_BRANCH_DISP)
#define ALPHA_JMP(op,ra,rb) ((op) | ((ra) << ALPHA_SHIFT_RA) | ((rb) << ALPHA_SHIFT_RB))
#define ALPHA_LIT(op,ra,lit,rc) ((op) | ((ra) << ALPHA_SHIFT_RA) \
| (((lit)&ALPHA_MASK_LITERAL) << ALPHA_SHIFT_LITERAL) \
| ALPHA_BIT_LITERAL \
| ((rc) << ALPHA_SHIFT_RC))
#define ALPHA_MEM(op,ra,rb,disp)((op) | ((ra) << ALPHA_SHIFT_RA) | ((rb) << ALPHA_SHIFT_RB) | (disp)&ALPHA_MASK_DISP)
#define ALPHA_OPR(op,ra,rb,rc) ((op) | ((ra) << ALPHA_SHIFT_RA) | ((rb) << ALPHA_SHIFT_RB) | ((rc) << ALPHA_SHIFT_RC))
#ifdef DEBUG
#define GET_OPCODE(ains) ((ains >> ALPHA_SHIFT_OP) & ALPHA_MASK_OP)
#define GET_RA(ains) ((ains >> ALPHA_SHIFT_RA) & ALPHA_MASK_REG)
#define GET_RB(ains) ((ains >> ALPHA_SHIFT_RB) & ALPHA_MASK_REG)
#define GET_RC(ains) ((ains >> ALPHA_SHIFT_RC) & ALPHA_MASK_REG)
#define GET_MEMDISP(ains) ((ains >> ALPHA_SHIFT_DISP) & ALPHA_MASK_DISP)
#define GET_BRDISP(ains) ((ains >> ALPHA_SHIFT_BRANCH_DISP) & ALPHA_MASK_BRANCH_DISP)
#define GET_FUNC(ains) ((ains >> ALPHA_SHIFT_FUNC) & ALPHA_MASK_FUNC)
#define ADDL_INST "addl"
#define SUBL_INST "subl"
#define SUBQ_INST "subq"
#define BIS_INST "bis"
#define JSR_INST "jsr"
#define RET_INST "ret"
#define JMP_INST "jmp"
#define LDA_INST "lda"
#define LDAH_INST "ldah"
#define LDL_INST "ldl"
#define LDQ_INST "ldq"
#define STL_INST "stl"
#define STQ_INST "stq"
#define BR_INST "br"
#define BSR_INST "bsr"
#define BLBC_INST "blbc"
#define BEQ_INST "beq"
#define BLT_INST "blt"
#define BLE_INST "ble"
#define BLBS_INST "blbs"
#define BNE_INST "bne"
#define BGE_INST "bge"
#define BGT_INST "bgt"
#define CONSTANT "Constant 0x"
/* Space for op_code to be in */
#define OPSPC 7
#endif

27
sr_alpha/cacheflush.m64
View File

@ -1,27 +0,0 @@
; ################################################################
; # #
; # Copyright 2001, 2008 Fidelity Information Services, Inc #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ################################################################
.title cacheflush - flush data and instruction caches
; cacheflush
;
; entry:
; a0 (r16) address of start of region to flush
; a1 (r17) length (in bytes) of region to flush
; a2 (r18) flag indicating which region to flush (not used on AXP)
$routine name=cacheflush, entry=cacheflush_ca, kind=null
imb
ret r26
$end_routine name=cacheflush

158
sr_alpha/double2s.c
View File

@ -1,158 +0,0 @@
/****************************************************************
* *
* Copyright 2001, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "stringpool.h"
#define MAX_NUM_SIZE 64
GBLREF spdesc stringpool;
static char pot_index [256] =
{
-78, 78, -77, 77, 77, 77, -76, 76, 76, -75, 75, 75, -74, 74, 74, 74,
-73, 73, 73, -72, 72, 72, -71, 71, 71, 71, -70, 70, 70, -69, 69, 69,
-68, 68, 68, -67, 67, 67, 67, -66, 66, 66, -65, 65, 65, -64, 64, 64,
64, -63, 63, 63, -62, 62, 62, -61, 61, 61, 61, -60, 60, 60, -59, 59,
59, -58, 58, 58, 58, -57, 57, 57, -56, 56, 56, -55, 55, 55, 55, -54,
54, 54, -53, 53, 53, -52, 52, 52, 52, -51, 51, 51, -50, 50, 50, -49,
49, 49, 49, -48, 48, 48, -47, 47, 47, -46, 46, 46, 46, -45, 45, 45,
-44, 44, 44, -43, 43, 43, 43, -42, 42, 42, -41, 41, 41, -40, 40, 40,
40, -39, 39, 39, -38, 38, 38, -37, 37, 37, -36, 36, 36, 36, -35, 35,
35, -34, 34, 34, -33, 33, 33, 33, -32, 32, 32, -31, 31, 31, -30, 30,
30, 30, -29, 29, 29, -28, 28, 28, -27, 27, 27, 27, -26, 26, 26, -25,
25, 25, -24, 24, 24, 24, -23, 23, 23, -22, 22, 22, -21, 21, 21, 21,
-20, 20, 20, -19, 19, 19, -18, 18, 18, 18, -17, 17, 17, -16, 16, 16,
-15, 15, 15, 15, -14, 14, 14, -13, 13, 13, -12, 12, 12, 12, -11, 11,
11, -10, 10, 10, -9, 9, 9, -8, 8, 8, 8, -7, 7, 7, -6, 6,
6, -5, 5, 5, 5, -4, 4, 4, -3, 3, 3, -2, 2, 2, 2, -1
};
static double pot [79] =
{
1.701411834604692e+38 + 2.83e+22,
1e+38, 1e+37, 1e+36, 1e+35, 1e+34, 1e+33, 1e+32,
1e+31, 1e+30, 1e+29, 1e+28, 1e+27, 1e+26, 1e+25, 1e+24,
1e+23, 1e+22, 1e+21, 1e+20, 1e+19, 1e+18, 1e+17, 1e+16,
1e+15, 1e+14, 1e+13, 1e+12, 1e+11, 1e+10, 1e+9, 1e+8,
1e+7, 1e+6, 1e+5, 1e+4, 1e+3, 1e+2, 1e+1, 1.0,
1e-1, 1e-2, 1e-3, 1e-4, 1e-5, 1e-6, 1e-7, 1e-8,
1e-9, 1e-10, 1e-11, 1e-12, 1e-13, 1e-14, 1e-15, 1e-16,
1e-17, 1e-18, 1e-19, 1e-20, 1e-21, 1e-22, 1e-23, 1e-24,
1e-25, 1e-26, 1e-27, 1e-28, 1e-29, 1e-30, 1e-31, 1e-32,
1e-33, 1e-34, 1e-35, 1e-36, 1e-37, 1e-38, 0
};
#define POT_UNITY 39 /* Subscript of pot: pot[POT_UNITY] == 1.0 */
struct D_float /* Format of D-floating point datum */
{
unsigned int : 7; /* fraction, bits 0:6 */
unsigned int exp : 8; /* exponent, bits 7:14 */
unsigned int sign : 1; /* sign, bit 15 */
unsigned int : 16; /* fraction, bits 16:31 */
unsigned int : 32; /* fraction, bits 32:63 */
};
void double2s (double *dp, mval *v)
{
double d = *dp;
char *p, *q;
int i, j, k;
ENSURE_STP_FREE_SPACE(MAX_NUM_SIZE);
assert (stringpool.free >= stringpool.base);
v->mvtype = MV_STR;
p = v->str.addr
= (char *)stringpool.free;
if (d == 0.0)
*p++ = '0';
else
{
if (d < 0.0)
{
*p++ = '-'; /* plug in a minus sign */
d = -d; /* but make d positive */
}
i = pot_index[((struct D_float *)dp)->exp];
if (i < 0)
{
i = -i;
if (d < pot[i])
++i;
}
i = POT_UNITY + 1 - i;
/* "Normalize" the number; i.e. adjust it to be between 0.0 and 1.0 */
d *= pot[i + POT_UNITY];
if (d < 5e-16)
/* Call it zero */
*p++ = '0';
else
{
/* Round the sixteenth digit */
d += 5e-16;
if (d >= 1.0)
{
/* Readjust it to be between 0.0 and 1.0 */
d /= 10.0;
++i;
}
q = p; /* q will point to the last non-zero byte */
j = i;
if (i <= 0)
{
*p++ = '.';
for (; i < 0; ++i)
*p++ = '0';
}
for (i = 15; i > 0; --i)
{
/* Multiply the value by ten, put the integer portion
of the result into k (0 <= k <= 9), and replace the
value with the fractional portion of the result */
k = d *= 10.0;
d -= k;
*p++ = '0' + k;
if (k > 0)
q = p;
if (--j == 0)
{
q = p;
*p++ = '.';
}
}
if (j > 0)
do
*p++ = '0';
while (--j > 0);
else
p = q;
}
}
v->str.len = p - (char *)stringpool.free;
stringpool.free = (unsigned char *)p;
assert(stringpool.free <= stringpool.top);
return;
}

278
sr_alpha/emit_code_sp.c
View File

@ -1,278 +0,0 @@
/****************************************************************
* *
* Copyright 2001, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "gtm_string.h"
#include "cgp.h"
#include "compiler.h"
#include <rtnhdr.h>
#include "list_file.h"
#include <emit_code.h>
GBLREF uint4 code_buf[]; /* Instruction buffer */
GBLREF int code_idx; /* Index into code_buf */
GBLREF char cg_phase; /* Current compiler phase */
GBLREF int4 curr_addr;
#ifdef DEBUG
GBLREF unsigned char *obpt; /* output buffer index */
GBLREF unsigned char outbuf[]; /* assembly language output buffer */
static unsigned int ains; /* assembler instruction (binary) */
#endif
/* Used by emit_base_offset to extract offset parts */
int alpha_adjusted_upper(int offset)
{
int upper;
upper = (offset >> 16) & 0xFFFF;
if (offset & 0x8000)
upper = (upper + 1) & 0xFFFF;
return upper;
}
void emit_base_offset(int base, int offset)
{
/* NOTE: emit_base_offset does not advance past its last
generated instruction because that instruction is
incomplete; it contains only a base and offset -- the
rt and opcode field are left empty for use by the caller. */
int upper, low, source;
switch (cg_phase)
{
#ifdef DEBUG
case CGP_ASSEMBLY:
#endif
case CGP_ADDR_OPT:
case CGP_APPROX_ADDR:
case CGP_MACHINE:
assert(base >= 0 && base <= 31);
source = base;
upper = alpha_adjusted_upper(offset);
if (0 != upper)
{
code_buf[code_idx++] = ALPHA_INS_LDAH
| (GTM_REG_CODEGEN_TEMP << ALPHA_SHIFT_RA)
| (source << ALPHA_SHIFT_RB)
| (upper & ALPHA_MASK_DISP) << ALPHA_SHIFT_DISP;
source = GTM_REG_CODEGEN_TEMP;
}
low = offset & 0xFFFF;
code_buf[code_idx] = source << ALPHA_SHIFT_RB
| (low & ALPHA_MASK_DISP) << ALPHA_SHIFT_DISP;
break;
default:
GTMASSERT;
}
}
#ifdef DEBUG
void fmt_ra()
{
*obpt++ = 'r';
obpt = i2asc(obpt, GET_RA(ains));
}
void fmt_ra_rb()
{
fmt_ra();
*obpt++ = ',';
*obpt++;
*obpt++ = 'r';
obpt = i2asc(obpt, GET_RB(ains));
}
void fmt_ra_rb_rc()
{
fmt_ra_rb();
*obpt++ = ',';
*obpt++;
*obpt++ = 'r';
obpt = i2asc(obpt, GET_RC(ains));
}
void fmt_ra_mem()
{
fmt_ra();
*obpt++ = ',';
obpt++;
*obpt++ = '0';
*obpt++ = 'x';
obpt += i2hex_nofill(GET_MEMDISP(ains), obpt, 6);
*obpt++ = '(';
*obpt++ = 'r';
obpt = i2asc(obpt, GET_RB(ains));
*obpt++ = ')';
}
void fmt_ra_brdisp()
{
fmt_ra();
*obpt++ = ',';
obpt++;
*obpt++ = '0';
*obpt++ = 'x';
obpt += i2hex_nofill(GET_BRDISP(ains) * 4, obpt, 6);
}
void format_machine_inst(void)
{
int instindx;
for (instindx = 0; instindx < code_idx; instindx++)
{
list_chkpage();
obpt = &outbuf[0];
memset(obpt, SP, ASM_OUT_BUFF);
obpt += 10;
i2hex((curr_addr - SIZEOF(rhdtyp)), (uchar_ptr_t)obpt, 8);
curr_addr += 4;
obpt += 10;
i2hex(code_buf[instindx], (uchar_ptr_t)obpt, 8);
obpt += 10;
ains = code_buf[instindx];
switch(GET_OPCODE(ains))
{
case 0x8:
memcpy(obpt, LDA_INST, SIZEOF(LDA_INST) - 1);
obpt += OPSPC;
fmt_ra_mem();
break;
case 0x9:
memcpy(obpt, LDAH_INST, SIZEOF(LDAH_INST) - 1);
obpt += OPSPC;
fmt_ra_mem();
break;
case 0x10:
/* Note opcodes 0x10, 0x11, have overlapping functions but none that we generate
so we can combine their disassembly.
*/
case 0x11:
switch(GET_FUNC(ains))
{
case 0x0: /* main opcode 0x10 */
memcpy(obpt, ADDL_INST, SIZEOF(ADDL_INST) - 1);
break;
case 0x9: /* main opcode 0x10 */
memcpy(obpt, SUBL_INST, SIZEOF(SUBL_INST) - 1);
break;
case 0x29: /* main opcode 0x10 */
memcpy(obpt, SUBQ_INST, SIZEOF(SUBQ_INST) - 1);
break;
case 0x20: /* main opcode 0x11 */
memcpy(obpt, BIS_INST, SIZEOF(BIS_INST) - 1);
break;
default:
GTMASSERT;
}
obpt += OPSPC;
fmt_ra_rb_rc();
break;
case 0x1a:
switch(GET_MEMDISP(ains) & 0x3)
{
case 0x0:
memcpy(obpt, JMP_INST, SIZEOF(JMP_INST) - 1);
break;
case 0x1:
memcpy(obpt, JSR_INST, SIZEOF(JSR_INST) - 1);
break;
case 0x2:
memcpy(obpt, RET_INST, SIZEOF(RET_INST) - 1);
break;
default:
GTMASSERT;
}
obpt += OPSPC;
fmt_ra_rb();
break;
case 0x28:
memcpy(obpt, LDL_INST, SIZEOF(LDL_INST) - 1);
obpt += OPSPC;
fmt_ra_mem();
break;
case 0x29:
memcpy(obpt, LDQ_INST, SIZEOF(LDQ_INST) - 1);
obpt += OPSPC;
fmt_ra_mem();
break;
case 0x2c:
memcpy(obpt, STL_INST, SIZEOF(STL_INST) - 1);
obpt += OPSPC;
fmt_ra_mem();
break;
case 0x2d:
memcpy(obpt, STQ_INST, SIZEOF(STQ_INST) - 1);
obpt += OPSPC;
fmt_ra_mem();
break;
case 0x30:
memcpy(obpt, BR_INST, SIZEOF(BR_INST) - 1);
obpt += OPSPC;
fmt_ra_brdisp();
break;
case 0x34:
memcpy(obpt, BSR_INST, SIZEOF(BSR_INST) - 1);
obpt += OPSPC;
fmt_ra_brdisp();
break;
case 0x38:
memcpy(obpt, BLBC_INST, SIZEOF(BLBC_INST) - 1);
obpt += OPSPC;
fmt_ra_brdisp();
break;
case 0x39:
memcpy(obpt, BEQ_INST, SIZEOF(BEQ_INST) - 1);
obpt += OPSPC;
fmt_ra_brdisp();
break;
case 0x3a:
memcpy(obpt, BLT_INST, SIZEOF(BLT_INST) - 1);
obpt += OPSPC;
fmt_ra_brdisp();
break;
case 0x3b:
memcpy(obpt, BLE_INST, SIZEOF(BLE_INST) - 1);
obpt += OPSPC;
fmt_ra_brdisp();
break;
case 0x3c:
memcpy(obpt, BLBS_INST, SIZEOF(BLBS_INST) - 1);
obpt += OPSPC;
fmt_ra_brdisp();
break;
case 0x3d:
memcpy(obpt, BNE_INST, SIZEOF(BNE_INST) - 1);
obpt += OPSPC;
fmt_ra_brdisp();
break;
case 0x3e:
memcpy(obpt, BGE_INST, SIZEOF(BGE_INST) - 1);
obpt += OPSPC;
fmt_ra_brdisp();
break;
case 0x3f:
memcpy(obpt, BGT_INST, SIZEOF(BGT_INST) - 1);
obpt += OPSPC;
fmt_ra_brdisp();
break;
default: /* Not an instruction but a constant */
memcpy(obpt, CONSTANT, SIZEOF(CONSTANT) - 1);
obpt += SIZEOF(CONSTANT) - 1;
i2hex(ains, obpt, 8);
obpt += 8;
}
emit_eoi();
}
}
#endif

206
sr_alpha/emit_code_sp.h
View File

@ -1,206 +0,0 @@
/****************************************************************
* *
* Copyright 2003, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#ifndef EMIT_CODE_SP_INCLUDED
#define EMIT_CODE_SP_INCLUDED
#include "axp_registers.h"
#include "axp_gtm_registers.h"
#include "axp.h"
void emit_base_offset(int base, int offset);
int alpha_adjusted_upper(int offset);
#ifdef DEBUG
void format_machine_inst(void);
void fmt_ra(void);
void fmt_ra_rb(void);
void fmt_ra_rb_rc(void);
void fmt_ra_mem(void);
void fmt_ra_brdisp(void);
#endif
#define INST_SIZE (int)SIZEOF(uint4)
#define BRANCH_OFFSET_FROM_IDX(idx_start, idx_end) (idx_end - (idx_start + 1))
#define LONG_JUMP_OFFSET (0x4ffffffc) /* should be large enough to force the long jump instruction sequence */
#define MAX_BRANCH_CODEGEN_SIZE 32 /* The length in bytes, of the longest form of branch instruction sequence */
#define MAX_OFFSET 0x3fff
#define STACK_ARG_OFFSET(indx) (8 * (indx)) /* All arguments on Alpha platforms are 8 bytes wide on stack */
#define MACHINE_FIRST_ARG_REG ALPHA_REG_A0
/* Register usage in some of the code generation expansions */
#define CALLS_TINT_TEMP_REG ALPHA_REG_R1
#define CLRL_REG ALPHA_REG_ZERO
#define CMPL_TEMP_REG ALPHA_REG_T1
#define GET_ARG_REG(indx) (ALPHA_REG_A0 + (indx))
#define MOVC3_SRC_REG ALPHA_REG_R0
#define MOVC3_TRG_REG ALPHA_REG_R1
#define MOVL_RETVAL_REG ALPHA_REG_V0
#define MOVL_REG_R1 ALPHA_REG_R1
/* Macros to define the opcodes for use in emit_jmp() and emit_tip() args */
#define GENERIC_OPCODE_BEQ ((uint4)ALPHA_INS_BEQ)
#define GENERIC_OPCODE_BGE ((uint4)ALPHA_INS_BGE)
#define GENERIC_OPCODE_BGT ((uint4)ALPHA_INS_BGT)
#define GENERIC_OPCODE_BLE ((uint4)ALPHA_INS_BLE)
#define GENERIC_OPCODE_BLT ((uint4)ALPHA_INS_BLT)
#define GENERIC_OPCODE_BNE ((uint4)ALPHA_INS_BNE)
#define GENERIC_OPCODE_BLBC ((uint4)ALPHA_INS_BLBC)
#define GENERIC_OPCODE_BLBS ((uint4)ALPHA_INS_BLBS)
#define GENERIC_OPCODE_BR ((uint4)ALPHA_INS_BR)
#define GENERIC_OPCODE_LDA ((uint4)ALPHA_INS_LDA)
#define GENERIC_OPCODE_LOAD ((uint4)ALPHA_INS_LDL)
#define GENERIC_OPCODE_STORE ((uint4)ALPHA_INS_STL)
#define GENERIC_OPCODE_NOP ((uint4)ALPHA_INS_NOP)
/* Macro to extract parts of generic opcodes */
#define GENXCT_LOAD_SRCREG(inst) ((inst >> ALPHA_SHIFT_RB) & ALPHA_MASK_REG)
/* Macros to create specific generated code sequences */
/* Note that the GEN_CLEAR/SET_TRUTH macros are only used on VMS (TRUTH_IN_REG) */
#define GEN_CLEAR_TRUTH code_buf[code_idx++] = (ALPHA_INS_STL | ALPHA_REG_ZERO << ALPHA_SHIFT_RA \
| GTM_REG_DOLLAR_TRUTH << ALPHA_SHIFT_RB \
| 0 << ALPHA_SHIFT_DISP)
#define GEN_SET_TRUTH { \
code_buf[code_idx++] = (ALPHA_INS_BIS | ALPHA_REG_ZERO << ALPHA_SHIFT_RA \
| 1 << ALPHA_SHIFT_LITERAL | ALPHA_BIT_LITERAL \
| GTM_REG_CODEGEN_TEMP << ALPHA_SHIFT_RC); \
code_buf[code_idx++] = (ALPHA_INS_STL | GTM_REG_CODEGEN_TEMP << ALPHA_SHIFT_RA \
| GTM_REG_DOLLAR_TRUTH << ALPHA_SHIFT_RB \
| 0 << ALPHA_SHIFT_DISP); \
}
#define GEN_LOAD_ADDR(reg, breg, disp) code_buf[code_idx++] = (ALPHA_INS_LDA | reg << ALPHA_SHIFT_RA \
| breg << ALPHA_SHIFT_RB \
| (disp & ALPHA_MASK_DISP) << ALPHA_SHIFT_DISP)
#define GEN_LOAD_WORD(reg, breg, disp) code_buf[code_idx++] = (ALPHA_INS_LDL | reg << ALPHA_SHIFT_RA \
| breg << ALPHA_SHIFT_RB \
| (disp & ALPHA_MASK_DISP) << ALPHA_SHIFT_DISP)
#define GEN_STORE_WORD(reg, breg, disp) code_buf[code_idx++] = (ALPHA_INS_STL | reg << ALPHA_SHIFT_RA \
| breg << ALPHA_SHIFT_RB \
| (disp & ALPHA_MASK_DISP) << ALPHA_SHIFT_DISP)
#define GEN_LOAD_IMMED(reg, disp) GEN_LOAD_ADDR(reg, ALPHA_REG_ZERO, disp)
#define GEN_CLEAR_WORD_EMIT(reg) emit_trip(*(fst_opr + *inst++), TRUE, ALPHA_INS_STL, reg)
#define GEN_LOAD_WORD_EMIT(reg) emit_trip(*(fst_opr + *inst++), TRUE, ALPHA_INS_LDL, reg)
#define GEN_SUBTRACT_REGS(src1, src2, trgt) \
code_buf[code_idx++] = (ALPHA_INS_SUBL \
| src1 << ALPHA_SHIFT_RA \
| src2 << ALPHA_SHIFT_RB \
| trgt << ALPHA_SHIFT_RC)
#define GEN_ADD_IMMED(reg, imval) code_buf[code_idx++] = (ALPHA_INS_ADDL \
| reg << ALPHA_SHIFT_RA \
| imval << ALPHA_SHIFT_LITERAL | ALPHA_BIT_LITERAL \
| reg << ALPHA_SHIFT_RC)
#define GEN_JUMP_REG(reg) code_buf[code_idx++] = (ALPHA_INS_JMP | ALPHA_REG_ZERO << ALPHA_SHIFT_RA \
| reg << ALPHA_SHIFT_RB)
#define GEN_STORE_ARG(reg, offset) code_buf[code_idx++] = (ALPHA_INS_STQ | reg << ALPHA_SHIFT_RA \
| ALPHA_REG_SP << ALPHA_SHIFT_RB \
| (offset & ALPHA_MASK_DISP) << ALPHA_SHIFT_DISP)
#define GEN_PCREL code_buf[code_idx++] = (ALPHA_INS_LPC)
#define GEN_MOVE_REG(trg, src) code_buf[code_idx++] = (ALPHA_INS_MOVE | src << ALPHA_SHIFT_RA | trg << ALPHA_SHIFT_RC)
#if defined(__vms)
/* CALL_INST_SIZE is the byte length of the minimum-length instruction sequence to implement a transfer
* table call. In the case of OpenVMS AXP, this is the sequence:
*
* ldl r27, xfer(r11) ; get address of procedure descriptor from transfer table
* ldq r26, 8(r27) ; get code address of procedure from procedure descriptor
* jmp r26, (r26) ; call it
*
* This value is used to determine how to adjust the offset value for a relative call and may not
* be appropriate for the Alpha because VAX relative calls are emulated on the Alpha differently.
*/
# define CALL_INST_SIZE (3 * INST_SIZE)
# define GEN_XFER_TBL_CALL(xfer) \
{ \
emit_base_offset(GTM_REG_XFER_TABLE, xfer); \
code_buf[code_idx++] |= ALPHA_INS_LDL | ALPHA_REG_PV << ALPHA_SHIFT_RA; \
emit_base_offset(ALPHA_REG_PV, 8); \
code_buf[code_idx++] |= ALPHA_INS_LDQ | ALPHA_REG_RA << ALPHA_SHIFT_RA; \
code_buf[code_idx++] = ALPHA_INS_JSR | ALPHA_REG_RA << ALPHA_SHIFT_RA | ALPHA_REG_RA << ALPHA_SHIFT_RB; \
}
#elif defined(__osf__)
/* CALL_INST_SIZE is the byte length of the minimum-length instruction sequence to implement a transfer
* table call. In the case of OSF/1 (Digital Unix) AXP, this is the sequence:
*
* ldl r27, offset(r12) # get address of entry point from transfer table
* jmp r26, (r27) # call it
*
* This value is used to determine how to adjust the offset value for a relative call and may not
* be appropriate for the Alpha because VAX relative calls are emulated on the Alpha differently.
*/
# define CALL_INST_SIZE (2 * INST_SIZE)
# define GEN_XFER_TBL_CALL(xfer) \
{ \
emit_base_offset(GTM_REG_XFER_TABLE, xfer); \
code_buf[code_idx++] |= ALPHA_INS_LDL | ALPHA_REG_PV << ALPHA_SHIFT_RA; \
code_buf[code_idx++] = ALPHA_INS_JSR | ALPHA_REG_RA << ALPHA_SHIFT_RA | ALPHA_REG_PV << ALPHA_SHIFT_RB; \
}
#else
# error "Unsupported platform"
#endif
/* Macros to return an instruction value. This is typcically used to modify an instruction
that is already in the instruction buffer such as the last instruction that was created
by emit_pcrel().
*/
#define IGEN_COND_BRANCH_REG_OFFSET(opcode, reg, disp) (opcode | ((reg & ALPHA_MASK_REG) << ALPHA_SHIFT_RA) \
| ((disp & ALPHA_MASK_DISP) << ALPHA_SHIFT_BRANCH_DISP))
#define IGEN_UCOND_BRANCH_REG_OFFSET(opcode, reg, disp) IGEN_COND_BRANCH_REG_OFFSET(opcode, reg, disp)
#define IGEN_LOAD_ADDR_REG(reg) (ALPHA_INS_LDA | (reg & ALPHA_MASK_REG) << ALPHA_SHIFT_RA)
#define IGEN_LOAD_WORD_REG(reg) (ALPHA_INS_LDL | (reg & ALPHA_MASK_REG) << ALPHA_SHIFT_RA)
#define IGEN_LOAD_NATIVE_REG(reg) IGEN_LOAD_WORD_REG(reg)
#define IGEN_COND_BRANCH_OFFSET(disp) ((disp & ALPHA_MASK_BRANCH_DISP) << ALPHA_SHIFT_BRANCH_DISP)
#define IGEN_UCOND_BRANCH_OFFSET(disp) IGEN_COND_BRANCH_OFFSET(disp)
#define IGEN_LOAD_LINKAGE(reg) (ALPHA_INS_LDQ | (reg & ALPHA_MASK_REG) << ALPHA_SHIFT_RA)
#define IGEN_GENERIC_REG(opcode, reg) (opcode | ((reg & ALPHA_MASK_REG) << ALPHA_SHIFT_RA))
/* Some macros that are used in certain routines in emit_code.c. The names of these
macros start with the routine name they are used in.
*/
/* Branch has origin of +1 instructions. However, if the branch was nullified in an earlier shrink_trips,
* the origin is the current instruction itself */
#define EMIT_JMP_ADJUST_BRANCH_OFFSET branch_offset = ((branch_offset != 0) ? branch_offset - 1 : 0)
/* Can jump be done within range of immediate operand */
#define EMIT_JMP_SHORT_CODE_CHECK (branch_offset >= (-(ALPHA_MASK_BRANCH_DISP/2) - 1) \
&& branch_offset <= (ALPHA_MASK_BRANCH_DISP/2))
/* Emit the short jump */
#define EMIT_JMP_SHORT_CODE_GEN \
{ \
code_buf[code_idx++] = (branchop | (reg << ALPHA_SHIFT_RA) \
| ((branch_offset & ALPHA_MASK_BRANCH_DISP) << ALPHA_SHIFT_BRANCH_DISP)); \
branch_offset--; \
}
/* Is this a conditional branch? */
#define EMIT_JMP_OPPOSITE_BR_CHECK (branchop != ALPHA_INS_BR && (branchop != ALPHA_INS_BEQ || reg != ALPHA_REG_ZERO))
#define EMIT_JMP_GEN_COMPARE /* No compare necessary */
#define EMIT_JMP_LONG_CODE_CHECK FALSE
/* Is the offset field in this instruction zero? */
#define EMIT_JMP_ZERO_DISP_COND (0 == ((code_buf[code_idx] >> ALPHA_SHIFT_DISP) & ALPHA_MASK_DISP))
/* Emit code to load a given numeric literal */
#define EMIT_TRIP_ILIT_GEN { /* Emit liternal number */ \
emit_base_offset(ALPHA_REG_ZERO, immediate); \
code_buf[code_idx++] |= (ALPHA_INS_LDA | \
(trg_reg & ALPHA_MASK_REG) << ALPHA_SHIFT_RA); \
}
/*
* GT.M on AIX and SPARC is 64bit
* By default the loads/stores use ldd/std(load double),
* but if the value being dealt with is a word,the
* opcode in generic_inst is changed to ldw/stw
*/
#define REVERT_GENERICINST_TO_WORD(inst)
#endif

32
sr_alpha/follow.m64
View File

@ -1,32 +0,0 @@
; ################################################################
; # #
; # Copyright 2001, 2008 Fidelity Information Services, Inc #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ################################################################
.title FOLLOW "Allows run-time modules to call OP_FOLLOW"
; FOLLOW simply passes its two arguments, which are pointers to
; mval's, to OP_FOLLOW, which expects them in registers r0 and r1.
; OP_FOLLOW returns 1, 0, or -1; FOLLOW returns a boolean result:
; 1 (true) if OP_FOLLOW returned 1, otherwise 0 (false).
$routine FOLLOW, entry=FOLLOW_CA, kind=stack
.base r27, $ls
sextl r16, r0
sextl r17, r1
$call OP_FOLLOW, set_arg_info=false
sextl r0, r0
cmovlt r0, 0, r0
$return
$end_routine
.end

24
sr_alpha/inst_flush.m64
View File

@ -1,24 +0,0 @@
; ################################################################
; # #
; # Copyright 2001, 2008 Fidelity Information Services, Inc #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ################################################################
.title inst_flush flush instruction cache
; inst_flush is a C-callable routine that makes the instruction cache coherent with memory.
$routine name=inst_flush,entry=inst_flush_ca,kind=null
imb
ret r26
$end_routine name=inst_flush
.end

51
sr_alpha/mint2mval.m64
View File

@ -1,51 +0,0 @@
.title mint2mval "Convert integer to mval"
; ###############################################################
; # #
; # Copyright 2001, 2004 Sanchez Computer Associates, Inc. #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ###############################################################
; On input, r1 = integer value, r0 -> mval
mval$def
$linkage_section
int_hi_val:
.quad INT_HI
$routine MINT2MVAL, entry=MINT2MVAL_CA, kind=null
lda sp, -24(sp)
stq r26, (sp)
stq r13, 8(sp)
mov r27, r13
.base r13, $ls
ldq r22, int_hi_val
cmplt r1, r22, r28
beq r28, 11$ ; int >= INT_HI
negq r22, r22
cmple r1, r22, r28
bne r28, 11$ ; int <= -INT_HI
mv_i2mval r1, r0
12$: ldq r26, (sp)
ldq r13, 8(sp)
lda sp, 24(sp)
ret r26
11$: mov r0, r16
mov r1, r17
$call I2MVAL, args=<r16, r17>, set_arg_info=false, nonstandard=true
br 12$
$end_routine
.end

21
sr_alpha/movq.m64
View File

@ -1,21 +0,0 @@
; ################################################################
; # #
; # Copyright 2001, 2008 Fidelity Information Services, Inc #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ################################################################
.title movq move quadword
$routine name=movq,entry=movq_ca,kind=null
ldq r28, (r16)
stq r28, (r17)
ret r26
$end_routine name=movq

39
sr_alpha/mval2bool.m64
View File

@ -1,39 +0,0 @@
; ################################################################
; # #
; # Copyright 2000, 2008 Fidelity Information Services, Inc #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ################################################################
.title mval2bool "Sets condition code from mval"
; On entry, r1 -> mval.
; On exit, r24 = numeric value of mval
mval$def
$routine MVAL2BOOL, entry=MVAL2BOOL_CA, kind=null
lda sp, -24(sp)
stq r26, (sp)
stq r13, 8(sp)
mov r27, r13
.base r13, $ls
mv_force_defined r1
stq r1, 16(sp)
mv_force_num (r1)
ldq r1, 16(sp)
ldl r24, mval$l_m1(r1)
ldq r26, (sp)
ldq r13, 8(sp)
lda sp, 24(sp)
ret r26
$end_routine
.end

39
sr_alpha/mval2mint.m64
View File

@ -1,39 +0,0 @@
; ################################################################
; # #
; # Copyright 2000, 2008 Fidelity Information Services, Inc #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ################################################################
.title mval2mint "Converts an mval to integer"
; On entry, r1 -> mval
; On exit, r0 = integer value
mval$def
$routine MVAL2MINT, entry=MVAL2MINT_CA, kind=null
lda sp, -24(sp)
stq r26, (sp)
stq r13, 8(sp)
mov r27, r13
.base r13, $ls
mv_force_defined r1
stq r1, 16(sp)
mv_force_num (r1)
ldq r16, 16(sp)
$call MVAL2I, args=<r16>, set_arg_info=false, nonstandard=true
ldq r26, (sp)
ldq r13, 8(sp)
lda sp, 24(sp)
ret r26
$end_routine
.end

457
sr_alpha/objlangdefs.h
View File

@ -1,457 +0,0 @@
/****************************************************************
* *
* Copyright 2001 Sanchez Computer Associates, Inc. *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
/* Object record types: */
#define EOBJ$C_EMH 8
#define EOBJ$C_EEOM 9
#define EOBJ$C_EGSD 10
#define EOBJ$C_ETIR 11
#define EOBJ$C_EDBG 12
#define EOBJ$C_ETBT 13
#define EOBJ$C_MAXRECTYP 13
/* Byte offsets into object record and related constants: */
#define EOBJ$K_SUBTYP 4
#define EOBJ$C_SUBTYP 4
#define EOBJ$C_MAXRECSIZ 8192
#define EOBJ$C_STRLVL 2
#define EOBJ$C_SYMSIZ 31
#define EOBJ$C_STOREPLIM -1
#define EOBJ$C_PSCALILIM 16
#define EOBJ$S_EOBJRECDEF 10
#define EOBJ$W_RECTYP 0
#define EOBJ$W_SIZE 2
#define EOBJ$W_SUBTYP 4
#define EOBJ$B_MHD_STRLV 6
#define EOBJ$B_MHD_HOLD 7
#define EOBJ$W_MHD_RECSZ 8
#define EOBJ$T_MHD_NAME 10
/* Object header record (EOBJ$C_EMH) subtypes: */
#define EMH$C_MHD 0
#define EMH$C_LNM 1
#define EMH$C_SRC 2
#define EMH$C_TTL 3
#define EMH$C_CPR 4
#define EMH$C_MTC 5
#define EMH$C_GTX 6
#define EMH$C_MAXHDRTYP 6
/* Byte offsets of fields in object header record (EOBJ$C_EMH): */
#define EMH$S_EMHDEF 52
#define EMH$W_RECTYP 0
#define EMH$W_SIZE 2
#define EMH$W_HDRTYP 4
#define EMH$B_STRLVL 6
#define EMH$B_TEMP 7
#define EMH$L_ARCH1 8
#define EMH$L_ARCH2 12
#define EMH$L_RECSIZ 16
#define EMH$B_NAMLNG 20
#define EMH$S_NAME 31
#define EMH$T_NAME 21
#define EEOM$C_SUCCESS 0
#define EEOM$C_WARNING 1
#define EEOM$C_ERROR 2
#define EEOM$C_ABORT 3
#define EEOM$K_EOMMIN 10
#define EEOM$C_EOMMIN 10
#define EEOM$K_EOMMX1 10
#define EEOM$C_EOMMX1 10
#define EEOM$M_WKTFR 0X1
#define EEOM$K_EOMMAX 24
#define EEOM$C_EOMMAX 24
#define EEOM$S_EEOMDEF 24
#define EEOM$W_RECTYP 0
#define EEOM$W_SIZE 2
#define EEOM$L_TOTAL_LPS 4
#define EEOM$W_COMCOD 8
#define EEOM$B_TFRFLG 10
#define EEOM$V_WKTFR 0
#define EEOM$B_TEMP 11
#define EEOM$L_PSINDX 12
#define EEOM$S_TFRADR 8
#define EEOM$Q_TFRADR 16
#define EEOM$L_TFRADR 16
#define EGSD$K_ENTRIES 2
#define EGSD$C_ENTRIES 2
#define EGSD$C_PSC 0
#define EGSD$C_SYM 1
#define EGSD$C_IDC 2
#define EGSD$C_ENV 3
#define EGSD$C_LSY 4
#define EGSD$C_SPSC 5
#define EGSD$C_SYMV 6
#define EGSD$C_SYMM 7
#define EGSD$C_SYMG 8
#define EGSD$C_MAXRECTYP 8
#define EGSD$S_EGSDEF 12
#define EGSD$W_RECTYP 0
#define EGSD$W_RECSIZ 2
#define EGSD$L_ALIGNLW 4
#define EGSD$W_GSDTYP 8
#define EGSD$W_GSDSIZ 10
#define EGPS$M_PIC 0X1
#define EGPS$M_LIB 0X2
#define EGPS$M_OVR 0X4
#define EGPS$M_REL 0X8
#define EGPS$M_GBL 0X10
#define EGPS$M_SHR 0X20
#define EGPS$M_EXE 0X40
#define EGPS$M_RD 0X80
#define EGPS$M_WRT 0X100
#define EGPS$M_VEC 0X200
#define EGPS$M_NOMOD 0X400
#define EGPS$M_COM 0X800
#define EGPS$K_NAME 12
#define EGPS$C_NAME 12
#define EGPS$S_EGPSDEF 44
#define EGPS$W_GSDTYP 0
#define EGPS$T_START 0
#define EGPS$W_SIZE 2
#define EGPS$B_ALIGN 4
#define EGPS$B_TEMP 5
#define EGPS$W_FLAGS 6
#define EGPS$V_PIC 0
#define EGPS$V_LIB 1
#define EGPS$V_OVR 2
#define EGPS$V_REL 3
#define EGPS$V_GBL 4
#define EGPS$V_SHR 5
#define EGPS$V_EXE 6
#define EGPS$V_RD 7
#define EGPS$V_WRT 8
#define EGPS$V_VEC 9
#define EGPS$V_NOMOD 10
#define EGPS$V_COM 11
#define EGPS$L_ALLOC 8
#define EGPS$B_NAMLNG 12
#define EGPS$S_NAME 31
#define EGPS$T_NAME 13
#define ESGPS$M_PIC 0X1
#define ESGPS$M_LIB 0X2
#define ESGPS$M_OVR 0X4
#define ESGPS$M_REL 0X8
#define ESGPS$M_GBL 0X10
#define ESGPS$M_SHR 0X20
#define ESGPS$M_EXE 0X40
#define ESGPS$M_RD 0X80
#define ESGPS$M_WRT 0X100
#define ESGPS$M_VEC 0X200
#define ESGPS$M_NOMOD 0X400
#define ESGPS$M_COM 0X800
#define ESGPS$K_NAME 25
#define ESGPS$C_NAME 25
#define ESGPS$S_ESGPSDEF 56
#define ESGPS$W_GSDTYP 0
#define ESGPS$T_START 0
#define ESGPS$W_SIZE 2
#define ESGPS$B_ALIGN 4
#define ESGPS$B_TEMP 5
#define ESGPS$W_FLAGS 6
#define ESGPS$V_PIC 0
#define ESGPS$V_LIB 1
#define ESGPS$V_OVR 2
#define ESGPS$V_REL 3
#define ESGPS$V_GBL 4
#define ESGPS$V_SHR 5
#define ESGPS$V_EXE 6
#define ESGPS$V_RD 7
#define ESGPS$V_WRT 8
#define ESGPS$V_VEC 9
#define ESGPS$V_NOMOD 10
#define ESGPS$V_COM 11
#define ESGPS$L_ALLOC 8
#define ESGPS$L_BASE 12
#define ESGPS$S_VALUE 8
#define ESGPS$Q_VALUE 16
#define ESGPS$L_VALUE 16
#define ESGPS$B_NAMLNG 24
#define ESGPS$S_NAME 31
#define ESGPS$T_NAME 25
#define EGSY$M_WEAK 0X1
#define EGSY$M_DEF 0X2
#define EGSY$M_UNI 0X4
#define EGSY$M_REL 0X8
#define EGSY$M_COMM 0X10
#define EGSY$M_VECEP 0X20
#define EGSY$M_NORM 0X40
#define EGSY$S_EGSYDEF 8
#define EGSY$W_GSDTYP 0
#define EGSY$T_START 0
#define EGSY$W_SIZE 2
#define EGSY$B_DATYP 4
#define EGSY$B_TEMP 5
#define EGSY$W_FLAGS 6
#define EGSY$V_WEAK 0
#define EGSY$V_DEF 1
#define EGSY$V_UNI 2
#define EGSY$V_REL 3
#define EGSY$V_COMM 4
#define EGSY$V_VECEP 5
#define EGSY$V_NORM 6
#define EGST$K_NAME 37
#define EGST$C_NAME 37
#define EGST$S_EGSTDEF 68
#define EGST$W_GSDTYP 0
#define EGST$T_START 0
#define EGST$W_SIZE 2
#define EGST$B_DATYP 4
#define EGST$B_TEMP 5
#define EGST$W_FLAGS 6
#define EGST$S_VALUE 8
#define EGST$Q_VALUE 8
#define EGST$L_VALUE 8
#define EGST$S_LP_1 8
#define EGST$Q_LP_1 16
#define EGST$L_LP_1 16
#define EGST$S_LP_2 8
#define EGST$Q_LP_2 24
#define EGST$L_LP_2 24
#define EGST$L_PSINDX 32
#define EGST$B_NAMLNG 36
#define EGST$S_NAME 31
#define EGST$T_NAME 37
#define ESDF$K_NAME 33
#define ESDF$C_NAME 33
#define ESDF$S_ESDFDEF 64
#define ESDF$W_GSDTYP 0
#define ESDF$T_START 0
#define ESDF$W_SIZE 2
#define ESDF$B_DATYP 4
#define ESDF$B_TEMP 5
#define ESDF$W_FLAGS 6
#define ESDF$S_VALUE 8
#define ESDF$Q_VALUE 8
#define ESDF$L_VALUE 8
#define ESDF$S_CODE_ADDRESS 8
#define ESDF$Q_CODE_ADDRESS 16
#define ESDF$L_CODE_ADDRESS 16
#define ESDF$L_CA_PSINDX 24
#define ESDF$L_PSINDX 28
#define ESDF$B_NAMLNG 32
#define ESDF$S_NAME 31
#define ESDF$T_NAME 33
#define ESDFV$K_NAME 25
#define ESDFV$C_NAME 25
#define ESDFV$S_ESDFVDEF 56
#define ESDFV$W_GSDTYP 0
#define ESDFV$T_START 0
#define ESDFV$W_SIZE 2
#define ESDFV$B_DATYP 4
#define ESDFV$B_TEMP 5
#define ESDFV$W_FLAGS 6
#define ESDFV$S_VALUE 8
#define ESDFV$Q_VALUE 8
#define ESDFV$L_VALUE 8
#define ESDFV$L_PSINDX 16
#define ESDFV$L_VECTOR 20
#define ESDFV$B_NAMLNG 24
#define ESDFV$S_NAME 31
#define ESDFV$T_NAME 25
#define ESDFM$K_NAME 25
#define ESDFM$C_NAME 25
#define ESDFM$S_ESDFMDEF 56
#define ESDFM$W_GSDTYP 0
#define ESDFM$T_START 0
#define ESDFM$W_SIZE 2
#define ESDFM$B_DATYP 4
#define ESDFM$B_TEMP 5
#define ESDFM$W_FLAGS 6
#define ESDFM$S_VALUE 8
#define ESDFM$Q_VALUE 8
#define ESDFM$L_VALUE 8
#define ESDFM$L_PSINDX 16
#define ESDFM$L_VERSION_MASK 20
#define ESDFM$B_NAMLNG 24
#define ESDFM$S_NAME 31
#define ESDFM$T_NAME 25
#define ESRF$K_NAME 9
#define ESRF$C_NAME 9
#define ESRF$S_ESRFDEF 40
#define ESRF$W_GSDTYP 0
#define ESRF$T_START 0
#define ESRF$W_SIZE 2
#define ESRF$B_DATYP 4
#define ESRF$B_TEMP 5
#define ESRF$W_FLAGS 6
#define ESRF$B_NAMLNG 8
#define ESRF$S_NAME 31
#define ESRF$T_NAME 9
#define EIDC$C_LEQ 0
#define EIDC$C_EQUAL 1
#define EIDC$S_EIDCDEF 7
#define EIDC$W_GSDTYP 0
#define EIDC$W_SIZE 2
#define EIDC$B_NAMLNG 4
#define EIDC$T_NAME 5
#define EIDC$W_FLAGS 5
#define EIDC$V_BINIDENT 0
#define EIDC$S_IDMATCH 2
#define EIDC$V_IDMATCH 1
#define EIDC$S_ERRSEV 3
#define EIDC$V_ERRSEV 3
#define EENV$M_DEF 0X1
#define EENV$M_NESTED 0X2
#define EENV$S_EENVDEF 40
#define EENV$W_GSDTYP 0
#define EENV$W_SIZE 2
#define EENV$W_FLAGS 4
#define EENV$V_DEF 0
#define EENV$V_NESTED 1
#define EENV$W_ENVINDX 6
#define EENV$B_NAMLNG 8
#define EENV$S_NAME 31
#define EENV$T_NAME 9
#define ELSY$M_WEAK 0X1
#define ELSY$M_DEF 0X2
#define ELSY$M_UNI 0X4
#define ELSY$M_REL 0X8
#define ELSY$S_ELSYDEF 14
#define ELSY$W_GSDTYP 0
#define ELSY$T_START 0
#define ELSY$W_SIZE 2
#define ELSY$B_DATYP 4
#define ELSY$B_TEMP1 5
#define ELSY$W_FLAGS 6
#define ELSY$V_WEAK 0
#define ELSY$V_DEF 1
#define ELSY$V_UNI 2
#define ELSY$V_REL 3
#define ELSY$L_PSINDX 8
#define ELSY$W_ENVINDX 12
#define ELSRF$K_NAME 17
#define ELSRF$C_NAME 17
#define ELSRF$S_ELSRFDEF 48
#define ELSRF$W_GSDTYP 0
#define ELSRF$T_START 0
#define ELSRF$W_SIZE 2
#define ELSRF$B_DATYP 4
#define ELSRF$B_TEMP1 5
#define ELSRF$W_FLAGS 6
#define ELSRF$L_PSINDX 8
#define ELSRF$W_ENVINDX 12
#define ELSRF$W_TEMP2 14
#define ELSRF$B_NAMLNG 16
#define ELSRF$S_NAME 31
#define ELSRF$T_NAME 17
#define ELSDF$K_NAME 25
#define ELSDF$C_NAME 25
#define ELSDF$S_ELSDFDEF 56
#define ELSDF$W_GSDTYP 0
#define ELSDF$T_START 0
#define ELSDF$W_SIZE 2
#define ELSDF$B_DATYP 4
#define ELSDF$B_TEMP1 5
#define ELSDF$W_FLAGS 6
#define ELSDF$S_VALUE 8
#define ELSDF$Q_VALUE 8
#define ELSDF$L_VALUE 8
#define ELSDF$L_PSINDX 16
#define ELSDF$W_ENVINDX 20
#define ELSDF$W_TEMP2 22
#define ELSDF$B_NAMLNG 24
#define ELSDF$S_NAME 31
#define ELSDF$T_NAME 25
/* ETIR command types: */
/* ETIR stack commands: */
#define ETIR$C_MINSTACOD 0
#define ETIR$C_STA_GBL 0
#define ETIR$C_STA_LW 1
#define ETIR$C_STA_QW 2
#define ETIR$C_STA_PQ 3
#define ETIR$C_STA_LI 4
#define ETIR$C_STA_MOD 5
#define ETIR$C_STA_CKARG 6
#define ETIR$C_MAXSTACOD 6
#define ETIR$C_MINSTOCOD 50
#define ETIR$C_STO_B 50
#define ETIR$C_STO_W 51
#define ETIR$C_STO_LW 52
#define ETIR$C_STO_QW 53
#define ETIR$C_STO_IMMR 54
#define ETIR$C_STO_GBL 55
#define ETIR$C_STO_CA 56
#define ETIR$C_STO_RB 57
#define ETIR$C_STO_AB 58
#define ETIR$C_STO_OFF 59
#define ETIR$C_STO_IMM 61
#define ETIR$C_STO_GBL_LW 62
#define ETIR$C_STO_HINT_GBL 64
#define ETIR$C_STO_HINT_PS 65
#define ETIR$C_MAXSTOCOD 65
#define ETIR$C_MINOPRCOD 100
#define ETIR$C_OPR_NOP 100
#define ETIR$C_OPR_ADD 101
#define ETIR$C_OPR_SUB 102
#define ETIR$C_OPR_MUL 103
#define ETIR$C_OPR_DIV 104
#define ETIR$C_OPR_AND 105
#define ETIR$C_OPR_IOR 106
#define ETIR$C_OPR_EOR 107
#define ETIR$C_OPR_NEG 108
#define ETIR$C_OPR_COM 109
#define ETIR$C_OPR_INSV 110
#define ETIR$C_OPR_ASH 111
#define ETIR$C_OPR_USH 112
#define ETIR$C_OPR_ROT 113
#define ETIR$C_OPR_SEL 114
#define ETIR$C_OPR_REDEF 115
#define ETIR$C_OPR_DFLIT 116
#define ETIR$C_MAXOPRCOD 116
#define ETIR$C_MINCTLCOD 150
#define ETIR$C_CTL_SETRB 150
#define ETIR$C_CTL_AUGRB 151
#define ETIR$C_CTL_DFLOC 152
#define ETIR$C_CTL_STLOC 153
#define ETIR$C_CTL_STKDL 154
#define ETIR$C_MAXCTLCOD 154
#define ETIR$C_MINSTCCOD 200
#define ETIR$C_STC_LP 200
#define ETIR$C_STC_LP_PSB 201
#define ETIR$C_STC_GBL 202
#define ETIR$C_STC_GCA 203
#define ETIR$C_STC_PS 204
#define ETIR$C_STC_NOP_GBL 205
#define ETIR$C_STC_NOP_PS 206
#define ETIR$C_STC_BSR_GBL 207
#define ETIR$C_STC_BSR_PS 208
#define ETIR$C_STC_LDA_GBL 209
#define ETIR$C_STC_LDA_PS 210
#define ETIR$C_STC_BOH_GBL 211
#define ETIR$C_STC_BOH_PS 212
#define ETIR$C_STC_NBH_GBL 213
#define ETIR$C_STC_NBH_PS 214
#define ETIR$C_MAXSTCCOD 214
#define ETIR$S_ETIRDEF 4
#define ETIR$W_RECTYP 0
#define ETIR$W_SIZE 2

51
sr_alpha/op_call.m64
View File

@ -1,51 +0,0 @@
.title OP_CALL
; ###############################################################
; # #
; # Copyright 2001, 2003 Sanchez Computer Associates, Inc. #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ###############################################################
G_MSF
$linkage_section
a_frame_pointer:
.address frame_pointer
$code_section
$routine OP_CALLB, entry=OP_CALL_CA, aliases=<OP_CALLW, OP_CALLL>, kind=null
lda sp, -16(sp)
stq r13, 8(sp)
stq r26, (sp)
mov r27, r13
.base r13, $ls
ldq r1, a_frame_pointer
ldl r1, (r1)
; Bump the return PC past the branch sequence following the jsr that got us here:
addl r26, r16, r26 ; length of branch sequence
stl r26, msf$mpc_off(r1) ; and store it in the Mumps stack frame
$call COPY_STACK_FRAME, set_arg_info=false, nonstandard=true
ldq r12, a_frame_pointer
ldl r12, (r12)
ldq r26, (sp)
ldq r13, 8(sp)
lda sp, 16(sp)
ret r26
$end_routine
.end

61
sr_alpha/op_equnul.m64
View File

@ -1,61 +0,0 @@
; ################################################################
; # #
; # Copyright 2001, 2008 Fidelity Information Services, Inc #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ################################################################
.title OP_EQUNUL "Compare mval to null string"
mval$def
$linkage_section
a_undef_inhibit:
.address undef_inhibit
$code_section
$routine OP_EQUNUL, entry=OP_EQUNUL_CA, kind=null
.base r27, $ls
mv_if_notdefined (r0), 30$
mv_if_notstring (r0), 20$
ldl r28, mval$l_strlen(r0)
bne r28, 20$
; Mval is a null string
10$: mov 1, r24
ret r26
; Mval is not a null string
20$: clr r24
ret r26
; If undef_inhibit is set, then all undefined values are equal to the null string:
30$: ldq r28, a_undef_inhibit
ldq_u r24, (r28)
extbl r24, r28, r24
bne r24, 10$ ; it's set; treat mval as a null string
; It's not set, so issue a message:
lda sp, -8(sp) ; but first,
stq r26, (sp) ; save the return address
mov r0, r16
$call UNDERR, args=<r16>, set_arg_info=false, nonstandard=true
ldq r26, (sp) ; restore our return address
lda sp, 8(sp)
ret r26
$end_routine
.end

51
sr_alpha/op_forlcldo.m64
View File

@ -1,51 +0,0 @@
.title OP_FORLCLDO
; ###############################################################
; # #
; # Copyright 2001, 2003 Sanchez Computer Associates, Inc. #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ###############################################################
G_MSF
$linkage_section
a_frame_pointer:
.address frame_pointer
$code_section
$routine OP_FORLCLDOB, entry=OP_FORLCLDO_CA, aliases=<OP_FORLCLDOW,OP_FORLCLDOL>, kind=null
lda sp, -16(sp)
stq r13, 8(sp)
stq r26, (sp)
mov r27, r13
.base r13, $ls
ldq r1, a_frame_pointer
ldl r1, (r1)
; Bump the return PC past the branch instruction following the jsr that got us here:
addl r26, r16, r26 ; length of branch sequence
stl r26, msf$mpc_off(r1) ; and store it in the Mumps stack frame
$call EXFUN_FRAME, set_arg_info=false, nonstandard=true
ldq r12, a_frame_pointer
ldl r12, (r12)
ldl r9, msf$temps_ptr_off(r12)
ldq r26, (sp)
ldq r13, 8(sp)
lda sp, 16(sp)
ret r26
$end_routine
.end

24
sr_alpha/op_linestart.m64
View File

@ -1,24 +0,0 @@
; ################################################################
; # #
; # Copyright 2001, 2008 Fidelity Information Services, Inc #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ################################################################
.title op_linestart
G_MSF
; op_linestart - establish start of line in GT.M MUMPS stack frame
$routine name=op_linestart,entry=op_linestart_ca,kind=null
stl r26, msf$mpc_off(r12)
stl r13, msf$ctxt_off(r12)
ret r26
$end_routine name=op_linestart

51
sr_alpha/op_pattern.m64
View File

@ -1,51 +0,0 @@
; ################################################################
; # #
; # Copyright 2001, 2008 Fidelity Information Services, Inc #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ################################################################
.title OP_PATTERN
mval$def
$routine OP_PATTERN, entry=OP_PATTERN_CA, kind=null
lda sp, -16(sp)
stq r13, 8(sp)
stq r26, (sp)
mov r27, r13
.base r13, $ls
mov r0, r16
mov r1, r17
;
; This is an array of unaligned ints. If the first word is zero, then call do_pattern
; instead of do_patfixed. Only the low order byte is significant and so it is the only
; one we need to test. We would do this in assembly because (1) we need the assmembly
; routine anyway to save the return value into $TEST and (2) it saves an extra level of
; call linkage at the C level to do the decision here.
;
ldl r28, mval$a_straddr(r1)
ldq_u r24, (r28)
extbl r24, r28, r24
beq r24, 20$
10$: $call DO_PATFIXED, args=<r16, r17>, set_arg_info=false, nonstandard=true
15$: mov r0, r24
ldq r26, (sp)
ldq r13, 8(sp)
lda sp, 16(sp)
ret r26
20$: $call DO_PATTERN, args=<r16, r17>, set_arg_info=false, nonstandard=true
br 15$
$end_routine
.end

41
sr_alpha/op_sorts_after.m64
View File

@ -1,41 +0,0 @@
; ################################################################
; # #
; # Copyright 2001, 2008 Fidelity Information Services, Inc #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ################################################################
.title OP_SORTS_AFTER
; On entry:
; r0 -> mval for left hand side
; r1 -> mval for right hand side
;
; On exit:
; r24 < 0 : lhs ']] rhs (lhs ]] rhs is false)
; r24 = 0 : lhs = rhs (lhs ]] rhs is false)
; r24 > 0 : lhs ]] rhs (lhs ]] rhs is true)
$routine OP_SORTS_AFTER, entry=OP_SORTS_AFTER_CA, kind=null
lda sp, -8(sp)
stq r26, (sp)
.base r27, $ls
mov r0, r16
mov r1, r17
$call SORTS_AFTER, args=<r16, r17>, set_arg_info=false, nonstandard=true
mov r0, r24
ldq r26, (sp)
lda sp, 8(sp)
ret r26
$end_routine
.end

37
sr_alpha/pseudo_ret.m64
View File

@ -1,37 +0,0 @@
; ################################################################
; # #
; # Copyright 2001, 2008 Fidelity Information Services, Inc #
; # #
; # This source code contains the intellectual property #
; # of its copyright holder(s), and is made available #
; # under a license. If you do not know the terms of #
; # the license, please stop and do not read further. #
; # #
; ################################################################
.title PSEUDO_RET
; PSEUDO_RET calls opp_ret (which doesn't return). It executes in a
; GT.M MUMPS stack frame and is, in fact, normally entered via a
; getframe/ret instruction sequence.
;
; entry:
; r13 - address of PSEUDO_RET's procedure descriptor (not r27)
;
; WARNING: because PSEUDO_RET is designed to be invoked from a GT.M
; MUMPS stack frame, it does not conform to the Alpha calling
; standard and cannot be invoked from any high-level language. The
; invoker should load the address of PSEUDO_RET's procedure descriptor
; into r13, not r27.
$code_section
$routine PSEUDO_RET, entry=PSEUDO_RET_CA, kind=null
.base r13, $ls
$call opp_ret, set_arg_info=false, nonstandard=true
$end_routine
.end

32
sr_arm/aswp.s Normal file
View File

@ -0,0 +1,32 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global aswp
.type aswp, %function
aswp:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size aswp, .-aswp

91
sr_arm/auto_zlink.c Normal file
View File

@ -0,0 +1,91 @@
/****************************************************************
* *
* Copyright 2001, 2012 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "gtm_string.h"
#include "i386.h"
#include "urx.h"
#include <rtnhdr.h>
#include "op.h"
#include <auto_zlink.h>
#define PEA_SZ 5
#define XFER_BYTE_SZ 3
#define XFER_LONG_SZ 6
#define INST_SZ 1
error_def(ERR_LABELUNKNOWN);
error_def(ERR_ROUTINEUNKNOWN);
rhdtyp *auto_zlink (unsigned char *pc, int4 **line)
{
char *adj_pc; /* address of PEA rtnref offset */
mstr rname;
mident_fixed rname_local;
urx_rtnref *rtnurx;
mval rtn;
rhdtyp *rhead;
union
{
ModR_M modrm;
unsigned char byte;
} modrm_byte_byte, modrm_byte_long;
/* ASSUMPTION -- The instruction previous to the current mpc is a transfer table jump.
* This is either a byte or a int4 displacement off of ebx, instruction
* size either 3 or 6 (prefix byte, ModR/M byte, 8- or 32-bit offset).
*/
modrm_byte_byte.modrm.reg_opcode = I386_INS_CALL_Ev;
modrm_byte_byte.modrm.mod = I386_MOD32_BASE_DISP_8;
modrm_byte_byte.modrm.r_m = I386_REG_EBX;
modrm_byte_long.modrm.reg_opcode = I386_INS_CALL_Ev;
modrm_byte_long.modrm.mod = I386_MOD32_BASE_DISP_32;
modrm_byte_long.modrm.r_m = I386_REG_EBX;
if ((*(pc - XFER_BYTE_SZ) == I386_INS_Grp5_Prefix) && (*(pc - XFER_BYTE_SZ + 1) == modrm_byte_byte.byte))
{
assert(*(pc - XFER_BYTE_SZ - PEA_SZ) == I386_INS_PUSH_Iv);
adj_pc = (char *)pc - XFER_BYTE_SZ - PEA_SZ;
} else if ((*(pc - XFER_LONG_SZ) == I386_INS_Grp5_Prefix) && (*(pc - XFER_LONG_SZ + 1) == modrm_byte_long.byte))
{
assert(*(pc - XFER_LONG_SZ - PEA_SZ) == I386_INS_PUSH_Iv);
adj_pc = (char *)pc - XFER_LONG_SZ - PEA_SZ;
} else
GTMASSERT;
if (azl_geturxrtn(adj_pc + INST_SZ, &rname, &rtnurx))
{
assert((0 <= rname.len) && (MAX_MIDENT_LEN >= rname.len));
assert(rname.addr);
/* Copy rname into local storage because azl_geturxrtn sets rname.addr to an address that is
* freed during op_zlink and before the call to find_rtn_hdr.
*/
memcpy(rname_local.c, rname.addr, rname.len);
rname.addr = rname_local.c;
assert(rtnurx);
assert(*(adj_pc - PEA_SZ) == I386_INS_PUSH_Iv);
assert(azl_geturxlab(adj_pc - PEA_SZ + INST_SZ, rtnurx));
assert(!find_rtn_hdr(&rname));
rtn.mvtype = MV_STR;
rtn.str.len = rname.len;
rtn.str.addr = rname.addr;
op_zlink (&rtn, 0);
if (0 != (rhead = find_rtn_hdr(&rname))) /* note the assignment */
{
*line = *(int4 **)(adj_pc - PEA_SZ + INST_SZ);
if (!(*line))
rts_error(VARLSTCNT(1) ERR_LABELUNKNOWN);
return rhead;
}
}
rts_error(VARLSTCNT(1) ERR_ROUTINEUNKNOWN);
return NULL;
}

8
sr_port/crit_wake_alarm.h → sr_arm/auto_zlink.h
View File

@ -1,6 +1,6 @@
/****************************************************************
* *
* Copyright 2001 Sanchez Computer Associates, Inc. *
* Copyright 2001, 2010 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
@ -9,9 +9,9 @@
* *
****************************************************************/
#ifndef __CRIT_WAKE_ALARM_H__
#define __CRIT_WAKE_ALARM_H__
#ifndef __AUTO_ZLINK_H__
#define __AUTO_ZLINK_H__
void crit_wake_alarm(void);
rhdtyp *auto_zlink (unsigned char *pc, int4 **line);
#endif

27
sr_arm/call_dm.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global call_dm
.type call_dm, %function
call_dm:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size call_dm, .-call_dm

27
sr_arm/ci_restart.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global ci_restart
.type ci_restart, %function
ci_restart:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size ci_restart, .-ci_restart

0
sr_unix/cmerrors_ctl.c → sr_arm/cmerrors_ctl.c
View File

0
sr_unix_gnp/cmierrors_ctl.c → sr_arm/cmierrors_ctl.c
View File

39
sr_arm/compswap.s Normal file
View File

@ -0,0 +1,39 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global compswap
.type compswap, %function
compswap:
@ args = 4, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #28
str r0, [fp, #-16]
str r1, [fp, #-20]
str r2, [fp, #-24]
str r3, [fp, #-28]
ldr r3, [fp, #-20]
str r3, [fp, #-8]
ldr r3, [fp, #-8]
add r3, r3, #17
str r3, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size compswap, .-compswap

13
sr_alpha/gtm_dump.c → sr_arm/dm_start.c
View File

@ -1,6 +1,6 @@
/****************************************************************
* *
* Copyright 2001 Sanchez Computer Associates, Inc. *
* Copyright 2001, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
@ -9,9 +9,8 @@
* *
****************************************************************/
/*** STUB FILE ***/
#include "mdef.h"
#include "error.h"
void gtm_dump(void) {};
int dm_start(void)
{
mum_tstart();
return 0;
}

57
sr_arm/dm_start.s Normal file
View File

@ -0,0 +1,57 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global dm_start_arm
.type dm_start_arm, %function
dm_start_arm:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size dm_start_arm, .-dm_start_arm
.align 2
.global gtm_levl_ret_code
.type gtm_levl_ret_code, %function
gtm_levl_ret_code:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size gtm_levl_ret_code, .-gtm_levl_ret_code
.align 2
.global gtm_ret_code
.type gtm_ret_code, %function
gtm_ret_code:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size gtm_ret_code, .-gtm_ret_code

1315
sr_arm/emit_code.c Normal file
View File

File diff suppressed because it is too large Load Diff

16
sr_port/crit_wake_alarm.c → sr_arm/emit_code.h
View File

@ -9,14 +9,12 @@
* *
****************************************************************/
#include "mdef.h"
#include "gt_timer.h"
#include "crit_wake_alarm.h"
#ifndef EMIT_CODE_INCLUDED
#define EMIT_CODE_INCLUDED
GBLDEF bool crit_timer_expired;
void trip_gen(triple *ct);
short *emit_vax_inst(short *inst, oprtype **fst_opr, oprtype **lst_opr);
void emit_xfer(short xfer);
void emit_base_offset (short reg_opcode, short base_reg, int4 offset);
void crit_wake_alarm(void)
{
crit_timer_expired = TRUE;
GT_WAKE;
}
#endif

85
sr_arm/find_line_call.c Normal file
View File

@ -0,0 +1,85 @@
/****************************************************************
* *
* Copyright 2001, 2012 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "xfer_enum.h"
#include "i386.h"
#include <rtnhdr.h> /* Needed by zbreak.h */
#include "zbreak.h"
zb_code *find_line_call(void *addr)
{
unsigned char *call_addr;
union
{
ModR_M modrm;
unsigned char byte;
} modrm_byte;
call_addr = (unsigned char *)addr;
modrm_byte.byte = *(call_addr + 1);
if ((I386_INS_Grp5_Prefix == *call_addr) && (I386_INS_CALL_Ev == modrm_byte.modrm.reg_opcode))
{
call_addr++;
assert(I386_REG_EBX == modrm_byte.modrm.r_m);
call_addr++;
if (I386_MOD32_BASE_DISP_8 == modrm_byte.modrm.mod)
{
if ((xf_linestart * SIZEOF(int4) == *call_addr) ||
(xf_zbstart * SIZEOF(int4) == *call_addr))
return (zb_code *)call_addr;
call_addr++;
} else
{
assert (I386_MOD32_BASE_DISP_32 == modrm_byte.modrm.mod);
return (zb_code *)addr;
}
}
modrm_byte.byte = *(call_addr + 1);
if ((I386_INS_PUSH_Ib == *call_addr) || (I386_INS_PUSH_Iv == *call_addr))
{
while ((I386_INS_PUSH_Ib == *call_addr) || (I386_INS_PUSH_Iv == *call_addr))
{
if (I386_INS_PUSH_Ib == *call_addr)
call_addr += 1 + SIZEOF(unsigned char);
else
{
assert(I386_INS_PUSH_Iv == *call_addr);
call_addr += 1 + SIZEOF(int4);
}
}
modrm_byte.byte = *(call_addr + 1);
if ((I386_INS_Grp5_Prefix != *call_addr++) || (I386_INS_CALL_Ev != modrm_byte.modrm.reg_opcode))
return (zb_code *)addr;
assert((I386_MOD32_BASE_DISP_8 == modrm_byte.modrm.mod) || (I386_MOD32_BASE_DISP_32 == modrm_byte.modrm.mod));
assert(I386_REG_EBX == modrm_byte.modrm.r_m);
call_addr++;
if (I386_MOD32_BASE_DISP_8 == modrm_byte.modrm.mod)
{
if ((xf_linefetch * SIZEOF(int4) != *call_addr) && (xf_zbfetch * SIZEOF(int4) != *call_addr))
return (zb_code *)addr;
}
}
else if ((I386_INS_Grp5_Prefix == *call_addr) && (I386_INS_CALL_Ev != modrm_byte.modrm.reg_opcode))
{
call_addr++;
assert((I386_MOD32_BASE_DISP_8 == modrm_byte.modrm.mod) || (I386_MOD32_BASE_DISP_32 == modrm_byte.modrm.mod));
assert(I386_REG_EBX == modrm_byte.modrm.r_m);
call_addr++;
if (I386_MOD32_BASE_DISP_8 == modrm_byte.modrm.mod)
{
if ((xf_linestart * SIZEOF(int4) != *call_addr) && (xf_zbstart * SIZEOF(int4) != *call_addr))
return (zb_code *)addr;
}
}
return (zb_code *)call_addr;
}

31
sr_arm/follow.s Normal file
View File

@ -0,0 +1,31 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global follow
.type follow, %function
follow:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
str r1, [fp, #-12]
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size follow, .-follow

4
sr_unix/gdeerrors_ctl.c → sr_arm/gdeerrors_ctl.c
View File

@ -70,6 +70,7 @@ LITDEF err_msg gdeerrors[] = {
"NONASCII", "!AD is illegal for a !AD as it contains non-ASCII characters", 4,
"CRYPTNOMM", "!AD is an encrypted database. Cannot support MM access method.", 2,
"JNLALLOCGROW", "Increased Journal ALLOCATION from [!AD blocks] to [!AD blocks] to match AUTOSWITCHLIMIT for !AD !AD", 8,
"KEYFORBLK", "But block size !AD can only support key size !AD", 4,
};
LITDEF int GDE_BLKSIZ512 = 150503435;
@ -129,9 +130,10 @@ LITDEF int GDE_WRITEERROR = 150503859;
LITDEF int GDE_NONASCII = 150503866;
LITDEF int GDE_CRYPTNOMM = 150503874;
LITDEF int GDE_JNLALLOCGROW = 150503883;
LITDEF int GDE_KEYFORBLK = 150503891;
GBLDEF err_ctl gdeerrors_ctl = {
248,
"GDE",
&gdeerrors[0],
57};
58};

428
sr_arm/incr_link.c Normal file
View File

@ -0,0 +1,428 @@
/****************************************************************
* *
* Copyright 2001, 2012 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "gtm_unistd.h"
#include "gtm_stdio.h"
#include "gtm_string.h"
#include <errno.h>
#include <rtnhdr.h>
#include "compiler.h"
#include "urx.h"
#include "objlabel.h" /* needed for masscomp.h */
#include "masscomp.h"
#include "gtmio.h"
#include "incr_link.h"
#include "min_max.h" /* MIDENT_CMP needs MIN */
#include "cmd_qlf.h" /* needed for CQ_UTF8 */
#include "gtm_text_alloc.h"
/* INCR_LINK - read and process a mumps object module. Link said module to currently executing image */
LITREF char gtm_release_name[];
LITREF int4 gtm_release_name_len;
static char *code;
GBLREF mident_fixed zlink_mname;
GBLREF boolean_t gtm_utf8_mode;
error_def(ERR_INVOBJ);
error_def(ERR_LOADRUNNING);
error_def(ERR_TEXT);
#define RELREAD 50 /* number of relocation entries to buffer */
typedef struct res_list_struct
{
struct res_list_struct *next, *list;
unsigned int addr, symnum;
} res_list;
void res_free(res_list *root);
bool addr_fix(int file, struct exec *fhead, urx_rtnref *urx_lcl, rhdtyp *code);
void zl_error(int4 file, int4 err, int4 err2, int4 len, char *addr);
bool incr_link(int file_desc)
{
rhdtyp *hdr, *old_rhead;
int code_size, save_errno, cnt;
int4 rhd_diff, read_size;
char *literal_ptr;
var_tabent *curvar;
char module_name[SIZEOF(mident_fixed)];
lab_tabent *lbt_ent, *lbt_bot, *lbt_top, *olbt_ent, *olbt_bot, *olbt_top, *curlab;
urx_rtnref urx_lcl_anchor;
int order;
struct exec file_hdr;
urx_lcl_anchor.len = 0;
urx_lcl_anchor.addr = 0;
urx_lcl_anchor.lab = 0;
urx_lcl_anchor.next = 0;
code = NULL;
DOREADRL(file_desc, &file_hdr, SIZEOF(file_hdr), read_size);
if (read_size != SIZEOF(file_hdr))
{
if (-1 == read_size)
{
save_errno = errno;
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, strlen(STRERROR(save_errno)),
STRERROR(save_errno));
} else
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, RTS_ERROR_TEXT("reading file header"));
} else if (OMAGIC != file_hdr.a_magic)
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, RTS_ERROR_TEXT("bad magic"));
else if (OBJ_LABEL != file_hdr.a_stamp)
return FALSE; /* wrong version */
assert(0 == file_hdr.a_bss);
code_size = file_hdr.a_text + file_hdr.a_data;
code = GTM_TEXT_ALLOC(code_size);
DOREADRL(file_desc, code, code_size, read_size);
if (read_size != code_size)
{
if (-1 == read_size)
{
save_errno = errno;
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, strlen(STRERROR(save_errno)), STRERROR(save_errno)); /* BYPASSOK */
} else
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, RTS_ERROR_TEXT("reading code"));
}
hdr = (rhdtyp *)code;
if (memcmp(&hdr->jsb[0], "GTM_CODE", SIZEOF(hdr->jsb)))
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, RTS_ERROR_TEXT("missing GTM_CODE"));
if ((hdr->compiler_qlf & CQ_UTF8) && !gtm_utf8_mode)
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT,
RTS_ERROR_TEXT("Object compiled with CHSET=UTF-8 which is different from $ZCHSET"));
if (!(hdr->compiler_qlf & CQ_UTF8) && gtm_utf8_mode)
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT,
RTS_ERROR_TEXT("Object compiled with CHSET=M which is different from $ZCHSET"));
literal_ptr = code + file_hdr.a_text;
for (cnt = hdr->vartab_len, curvar = VARTAB_ADR(hdr); cnt; --cnt, ++curvar)
{ /* relocate the variable table */
assert(0 < curvar->var_name.len);
curvar->var_name.addr += (uint4)literal_ptr;
}
for (cnt = hdr->labtab_len, curlab = LABTAB_ADR(hdr); cnt; --cnt, ++curlab)
/* relocate the label table */
curlab->lab_name.addr += (uint4)literal_ptr;
if (!addr_fix(file_desc, &file_hdr, &urx_lcl_anchor, hdr))
{
urx_free(&urx_lcl_anchor);
zl_error(file_desc, ERR_INVOBJ, ERR_TEXT, RTS_ERROR_TEXT("address fixup failure"));
}
if (!zlput_rname(hdr))
{
urx_free(&urx_lcl_anchor);
/* Copy routine name to local variable because zl_error free's it. */
memcpy(&module_name[0], hdr->routine_name.addr, hdr->routine_name.len);
zl_error(file_desc, 0, ERR_LOADRUNNING, hdr->routine_name.len, &module_name[0]);
}
urx_add(&urx_lcl_anchor);
old_rhead = (rhdtyp *)hdr->old_rhead_ptr;
lbt_bot = (lab_tabent *)((char *)hdr + hdr->labtab_ptr);
lbt_top = lbt_bot + hdr->labtab_len;
while (old_rhead)
{
lbt_ent = lbt_bot;
olbt_bot = (lab_tabent *)((char *)old_rhead + old_rhead->labtab_ptr);
olbt_top = olbt_bot + old_rhead->labtab_len;
for (olbt_ent = olbt_bot; olbt_ent < olbt_top; olbt_ent++)
{
for (; lbt_ent < lbt_top; lbt_ent++)
{
MIDENT_CMP(&olbt_ent->lab_name, &lbt_ent->lab_name, order);
if (order <= 0)
break;
}
if ((lbt_ent < lbt_top) && !order)
{
olbt_ent->lab_ln_ptr = lbt_ent->lab_ln_ptr;
olbt_ent->has_parms = lbt_ent->has_parms;
} else
olbt_ent->lab_ln_ptr = 0;
}
rhd_diff = (char *)hdr - (char *)old_rhead;
old_rhead->src_full_name = hdr->src_full_name;
old_rhead->routine_name = hdr->routine_name;
old_rhead->vartab_len = hdr->vartab_len;
old_rhead->vartab_ptr = hdr->vartab_ptr + rhd_diff;
old_rhead->ptext_ptr = hdr->ptext_ptr + rhd_diff;
old_rhead->current_rhead_ptr = rhd_diff;
old_rhead->temp_mvals = hdr->temp_mvals;
old_rhead->temp_size = hdr->temp_size;
old_rhead = (rhdtyp *) old_rhead->old_rhead_ptr;
}
urx_resolve(hdr, lbt_bot, lbt_top);
return TRUE;
}
bool addr_fix(int file, struct exec *fhead, urx_rtnref *urx_lcl, rhdtyp *code)
{
res_list *res_root, *new_res, *res_temp, *res_temp1;
char *symbols, *sym_temp, *sym_temp1, *symtop, *res_addr;
struct relocation_info rel[RELREAD];
int numrel, rel_read, i, string_size, sym_size;
size_t status;
mident_fixed rtnid, labid;
mstr rtn_str;
rhdtyp *rtn;
lab_tabent *label, *labtop;
bool labsym;
urx_rtnref *urx_rp;
urx_addr *urx_tmpaddr;
res_root = 0;
numrel = (fhead->a_trsize + fhead->a_drsize) / SIZEOF(struct relocation_info);
if (numrel * SIZEOF(struct relocation_info) != fhead->a_trsize + fhead->a_drsize)
return FALSE;
for ( ; numrel;)
{
rel_read = numrel < RELREAD ? numrel : RELREAD;
DOREADRC(file, rel, rel_read * SIZEOF(struct relocation_info), status);
if (0 != status)
{
res_free(res_root);
return FALSE;
}
numrel -= rel_read;
for (i = 0; i < rel_read; i++)
{
if (rel[i].r_extern)
{
new_res = (res_list *)malloc(SIZEOF(*new_res));
new_res->symnum = rel[i].r_symbolnum;
new_res->addr = rel[i].r_address;
new_res->next = new_res->list = 0;
/* Insert the relocation entry in symbol number order on the unresolved chain */
if (!res_root)
res_root = new_res;
else
{ res_temp = res_root;
res_temp1 = 0;
while (res_temp)
{
if (res_temp->symnum >= new_res->symnum)
break;
res_temp1 = res_temp;
res_temp = res_temp->next;
}
if (res_temp)
{ if (res_temp->symnum == new_res->symnum)
{
new_res->list = res_temp->list;
res_temp->list = new_res;
} else
{ if (res_temp1)
{
new_res->next = res_temp1->next;
res_temp1->next = new_res;
} else
{
assert(res_temp == res_root);
new_res->next = res_root;
res_root = new_res;
}
}
} else
res_temp1->next = new_res;
}
} else
*(unsigned int *)(((char *)code) + rel[i].r_address) += (unsigned int)code;
}
}
/* All relocations within the routine should have been done, so copy the routine_name */
assert(code->routine_name.len < SIZEOF(zlink_mname.c));
memcpy(&zlink_mname.c[0], code->routine_name.addr, code->routine_name.len);
zlink_mname.c[code->routine_name.len] = 0;
if (!res_root)
return TRUE;
if ((off_t)-1 == lseek(file, (off_t)fhead->a_syms, SEEK_CUR))
{ res_free(res_root);
return FALSE;
}
DOREADRC(file, &string_size, SIZEOF(string_size), status);
if (0 != status)
{
res_free(res_root);
return FALSE;
}
string_size -= SIZEOF(string_size);
symbols = malloc(string_size);
DOREADRC(file, symbols, string_size, status);
if (0 != status)
{
free(symbols);
res_free(res_root);
return FALSE;
}
/* Match up unresolved entries with the null terminated symbol name entries from the
* symbol text pool we just read in.
*/
sym_temp = sym_temp1 = symbols;
symtop = symbols + string_size;
for (i = 0; res_root; i++)
{
while (i < res_root->symnum)
{ /* Forward symbol space until our symnum index (i) matches the symbol we are processing in res_root */
while (*sym_temp)
{
if (sym_temp >= symtop)
{
free(symbols);
res_free(res_root);
return FALSE;
}
sym_temp++;
}
sym_temp++;
sym_temp1 = sym_temp;
i++;
}
assert (i == res_root->symnum);
/* Find end of routine name that we care about */
while (('.' != *sym_temp1) && *sym_temp1)
{ if (sym_temp1 >= symtop)
{
free(symbols);
res_free(res_root);
return FALSE;
}
sym_temp1++;
}
sym_size = sym_temp1 - sym_temp;
assert(sym_size <= MAX_MIDENT_LEN);
memcpy(&rtnid.c[0], sym_temp, sym_size);
rtnid.c[sym_size] = 0;
if ('_' == rtnid.c[0])
rtnid.c[0] = '%';
assert((sym_size != mid_len(&zlink_mname)) || (0 != memcmp(&zlink_mname.c[0], &rtnid.c[0], sym_size)));
rtn_str.addr = &rtnid.c[0];
rtn_str.len = sym_size;
rtn = find_rtn_hdr(&rtn_str); /* Routine already resolved? */
sym_size = 0;
labsym = FALSE;
if (*sym_temp1 == '.')
{ /* If symbol is for a label, find the end of the label name */
sym_temp1++;
sym_temp = sym_temp1;
while (*sym_temp1)
{
if (sym_temp1 >= symtop)
{
free(symbols);
res_free(res_root);
return FALSE;
}
sym_temp1++;
}
sym_size = sym_temp1 - sym_temp;
assert(sym_size <= MAX_MIDENT_LEN);
memcpy(&labid.c[0], sym_temp, sym_size);
labid.c[sym_size] = 0;
if ('_' == labid.c[0])
labid.c[0] = '%';
labsym = TRUE;
}
sym_temp1++;
sym_temp = sym_temp1;
if (rtn)
{ /* The routine part at least is known */
if (labsym)
{ /* Look our target label up in the routines label table */
label = (lab_tabent *)((char *)rtn + rtn->labtab_ptr);
labtop = label + rtn->labtab_len;
for (; label < labtop && ((sym_size != label->lab_name.len)
|| memcmp(&labid.c[0], label->lab_name.addr, sym_size)); label++)
;
if (label < labtop)
res_addr = (char *)&label->LABENT_LNR_OFFSET;
else
res_addr = 0;
} else
res_addr = (char *)rtn;
if (res_addr)
{ /* The external symbol definition is available. Resolve all references to it */
res_temp = res_root->next;
while (res_root)
{
*(uint4 *)(((char *)code) + res_root->addr) = (unsigned int)res_addr;
res_temp1 = res_root->list;
free(res_root);
res_root = res_temp1;
}
res_root = res_temp;
continue;
}
}
/* This symbol is unknown. Put on the (local) unresolved extern chain -- either for labels or routines */
urx_rp = urx_putrtn(rtn_str.addr, rtn_str.len, urx_lcl);
res_temp = res_root->next;
while (res_root)
{
if (labsym)
urx_putlab(&labid.c[0], sym_size, urx_rp, ((char *)code) + res_root->addr);
else
{ urx_tmpaddr = (urx_addr *)malloc(SIZEOF(urx_addr));
urx_tmpaddr->next = urx_rp->addr;
urx_tmpaddr->addr = (INTPTR_T *)(((char *)code) + res_root->addr);
urx_rp->addr = urx_tmpaddr;
}
res_temp1 = res_root->list;
free(res_root);
res_root = res_temp1;
}
res_root = res_temp;
}
free(symbols);
return TRUE;
}
void res_free(res_list *root)
{
res_list *temp;
while (root)
{ while (root->list)
{ temp = root->list->list;
free(root->list);
root->list = temp;
}
temp = root->next;
free(root);
root = temp;
}
}
/* ZL_ERROR - perform cleanup and signal errors found in zlinking a mumps object module
* err - an error code that accepts no arguments and
* err2 - an error code that accepts two arguments (!AD)
*/
void zl_error(int4 file, int4 err, int4 err2, int4 len, char *addr)
{
int rc;
if (code)
{
GTM_TEXT_FREE(code);
code = NULL;
}
CLOSEFILE_RESET(file, rc); /* resets "file" to FD_INVALID */
if ((0 != err) && (0 != err2))
rts_error(VARLSTCNT(6) err, 0, err2, 2, len, addr);
else if (0 != err)
rts_error(VARLSTCNT(1) err);
else
{
assert(0 != err2);
rts_error(VARLSTCNT(4) err2, 2, len, addr);
}
}

81
sr_arm/make_cimode.c Normal file
View File

@ -0,0 +1,81 @@
/****************************************************************
* *
* Copyright 2001, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "gtm_string.h"
#include "error.h"
#include <rtnhdr.h>
#include "op.h"
#include "i386.h"
#include "inst_flush.h"
#include "gtmci.h"
#include "gtm_text_alloc.h"
#define CALL_SIZE 5
#define CODE_SIZE (3 * CALL_SIZE)
#define CODE_LINES 3
/* The code created and returned by make_cimode() is executed in the frame GTM$CI at level 1 of
* every nested call-in environment. For every M routine being called-in from C, GTM$CI code
* will setup argument registers/stack and executes the M routine. When the M routine returns
* from its final QUIT, GTM$CI returns to gtm_ci(). make_cimode generates machine equivalents
* for the following operations in that order:
*
* CALL ci_restart :setup register/stack arguments from 'param_list' and transfer control
* to op_extcall/op_extexfun which return only after the M routine finishes and QUITs.
* CALL ci_ret_code :transfer control from the M routine back to C (gtm_ci). Never returns.
* CALL opp_ret :an implicit QUIT although it is never executed.
*
* Before GTM$CI executes, it is assumed that the global 'param_list' has been populated with
* argument/return mval*.
*/
rhdtyp *make_cimode(void)
{
static rhdtyp *base_address = NULL;
lab_tabent *lbl;
int *lnr;
unsigned char *code;
if (NULL != base_address)
return base_address;
base_address = (rhdtyp *)GTM_TEXT_ALLOC(SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent) + CODE_LINES * SIZEOF(int4));
memset(base_address,0,SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent) + CODE_LINES * SIZEOF(int4));
base_address->routine_name.len = STR_LIT_LEN(GTM_CIMOD);
base_address->routine_name.addr = GTM_CIMOD;
base_address->ptext_ptr = SIZEOF(rhdtyp);
base_address->vartab_ptr =
base_address->labtab_ptr = SIZEOF(rhdtyp) + CODE_SIZE; /* hdr + code */
base_address->lnrtab_ptr = SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent);
base_address->labtab_len = 1;
base_address->lnrtab_len = CODE_LINES;
code = (unsigned char *) base_address + base_address->ptext_ptr;
*code++ = I386_INS_CALL_Jv;
*((int4 *)code) = (int4)((unsigned char *)ci_restart - (code + SIZEOF(int4)));
code += SIZEOF(int4);
*code++ = I386_INS_CALL_Jv; /* a CALL to return control from M to ci_ret_code() which in turn returns to gtm_ci() */
*((int4 *)code) = (int4)((unsigned char *)ci_ret_code - (code + SIZEOF(int4)));
code += SIZEOF(int4);
*code++ = I386_INS_JMP_Jv;
*((int4 *)code) = (int4)((unsigned char *)opp_ret - (code + SIZEOF(int4)));
code += SIZEOF(int4);
lbl = (lab_tabent *)((int) base_address + base_address->labtab_ptr);
lbl->lab_ln_ptr = base_address->lnrtab_ptr;
lnr = (int *)((int)base_address + base_address->lnrtab_ptr);
*lnr++ = base_address->ptext_ptr;
*lnr++ = base_address->ptext_ptr;
*lnr++ = base_address->ptext_ptr + 2 * CALL_SIZE;
assert(code - ((unsigned char *)base_address + base_address->ptext_ptr) == CODE_SIZE);
zlput_rname(base_address);
inst_flush(base_address, SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent) + CODE_LINES * SIZEOF(int4));
return base_address;
}

67
sr_arm/make_dmode.c Normal file
View File

@ -0,0 +1,67 @@
/****************************************************************
* *
* Copyright 2001, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "gtm_string.h"
#include "error.h"
#include <rtnhdr.h>
#include "op.h"
#include "i386.h"
#include "inst_flush.h"
#include "dm_setup.h"
#include "gtm_text_alloc.h"
#define CALL_SIZE 5
#define CODE_SIZE 3*CALL_SIZE
#define CODE_LINES 3
rhdtyp *make_dmode(void)
{
rhdtyp *base_address;
lab_tabent *lbl;
int *lnr;
unsigned char *code;
/* dummy code + label entry + line entries */
base_address = (rhdtyp *)GTM_TEXT_ALLOC(SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent) + CODE_LINES * SIZEOF(int4));
memset(base_address,0,SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent) + CODE_LINES*SIZEOF(int4));
base_address->routine_name.len = STR_LIT_LEN(GTM_DMOD);
base_address->routine_name.addr = GTM_DMOD;
base_address->ptext_ptr = SIZEOF(rhdtyp);
base_address->vartab_ptr =
base_address->labtab_ptr = SIZEOF(rhdtyp) + CODE_SIZE; /* hdr + code */
base_address->lnrtab_ptr = SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent);
base_address->labtab_len = 1;
base_address->lnrtab_len = CODE_LINES;
code = (unsigned char *) base_address + base_address->ptext_ptr;
*code++ = I386_INS_CALL_Jv;
*((int4 *)code) = (int4)((unsigned char *)dm_setup - (code + SIZEOF(int4)));
code += SIZEOF(int4);
*code++ = I386_INS_CALL_Jv; /* this should be a CALL to maintain uniformity between transfer to mum_tstart from baseframe
and transfers to mum_tstart from error processing (MUM_TSTART marco in
mdb_condition_handler) */
*((int4 *)code) = (int4)((unsigned char *)mum_tstart - (code + SIZEOF(int4)));
code += SIZEOF(int4);
*code++ = I386_INS_JMP_Jv;
*((int4 *)code) = (int4)((unsigned char *)opp_ret - (code + SIZEOF(int4)));
code += SIZEOF(int4);
lbl = (lab_tabent *)((int) base_address + base_address->labtab_ptr);
lbl->lab_ln_ptr = base_address->lnrtab_ptr;
lnr = (int *)((int)base_address + base_address->lnrtab_ptr);
*lnr++ = base_address->ptext_ptr;
*lnr++ = base_address->ptext_ptr;
*lnr++ = base_address->ptext_ptr + 2 * CALL_SIZE;
assert(code - ((unsigned char *)base_address + base_address->ptext_ptr) == CODE_SIZE);
zlput_rname(base_address);
inst_flush(base_address, SIZEOF(rhdtyp) + CODE_SIZE + SIZEOF(lab_tabent) + CODE_LINES * SIZEOF(int4));
return base_address;
}

77
sr_arm/masscomp.h Normal file
View File

@ -0,0 +1,77 @@
/****************************************************************
* *
* Copyright 2001 Sanchez Computer Associates, Inc. *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
struct exec {
short a_magic; /* magic number */
short a_stamp; /* version stamp - RTU 2.0+ uses this - see below */
uint4 a_text; /* size of text segment */
uint4 a_data; /* size of initialized data */
uint4 a_bss; /* size of uninitialized data */
uint4 a_syms; /* size of symbol table */
uint4 a_entry; /* entry point */
uint4 a_trsize; /* size of text relocation */
uint4 a_drsize; /* size of data relocation */
};
/*
* Format of a relocation datum.
*/
struct relocation_info {
int r_address; /* address which is relocated */
unsigned int r_symbolnum:24, /* local symbol ordinal */
r_pcrel:1, /* was relocated pc relative already */
r_length:2, /* 0=byte, 1=word, 2=int4 */
r_extern:1, /* does not include value of sym referenced */
r_pad:4; /* nothing, yet */
};
struct rel_table {
struct rel_table *next, *resolve;
struct relocation_info r;
};
/*
* Format of a symbol table entry; this file is included by <a.out.h>
* and should be used if you aren't interested the a.out header
* or relocation information.
*/
struct nlist {
int4 n_strx; /* index into file string table */
unsigned char n_type; /* type flag, i.e. N_TEXT etc; see below */
char n_other; /* unused */
short n_desc; /* see <stab.h> */
uint4 n_value; /* value of this symbol (or sdb offset) */
};
struct sym_table {
struct sym_table *next;
struct nlist n;
struct rel_table *resolve;
unsigned short name_len;
unsigned char name[1];
};
/*
* Simple values for n_type.
*/
#define N_UNDF 0x0 /* undefined */
#define N_ABS 0x2 /* absolute */
#define N_TEXT 0x4 /* text */
#define N_DATA 0x6 /* data */
#define N_BSS 0x8 /* bss */
#define N_COMM 0x12 /* common (internal to ld) */
#define N_IPCOMM 0x16 /* initialized private */
#define N_PCOMM 0x18 /* uninitialized private */
#define N_FN 0x1f /* file name symbol */
#define N_EXT 01 /* external bit, or'ed in */
#define N_TYPE 0x1e /* mask for all the type bits */

55
sr_unix/merrors_ansi.h → sr_arm/merrors_ansi.h
View File

@ -427,8 +427,8 @@ const static readonly int error_ansi[] = {
0, /* JNLINVEXT */
0, /* MUPCLIERR */
0, /* JNLTMQUAL4 */
0, /* JNLBUFFTOOLG */
0, /* JNLBUFFTOOSM */
0, /* UNUSEDMSG594 */
0, /* UNUSEDMSG595 */
0, /* MUNODBNAME */
0, /* FILECREATE */
0, /* FILENOTCREATE */
@ -642,7 +642,7 @@ const static readonly int error_ansi[] = {
0, /* JNLRDONLY */
0, /* ANCOMPTINC */
0, /* ABNCOMPTINC */
0, /* GTMSECSHRLOGF */
0, /* UNUSEDMSG809 */
0, /* SOCKNOTFND */
0, /* CURRSOCKOFR */
79, /* SOCKETEXIST */
@ -731,8 +731,8 @@ const static readonly int error_ansi[] = {
0, /* SCNDDBNOUPD */
0, /* MUINFOUINT4 */
0, /* NLMISMATCHCALC */
0, /* GTMSECSHRLOGSWH */
0, /* GTMSECSHRDEFLOG */
0, /* UNUSEDMSG898 */
0, /* UNUSEDMSG899 */
0, /* DBBADNSUB */
0, /* DBBADKYNM */
0, /* DBBADPNTR */
@ -964,7 +964,7 @@ const static readonly int error_ansi[] = {
0, /* PREVJNLLINKCUT */
0, /* PREVJNLLINKSET */
0, /* FILENAMETOOLONG */
0, /* UNUSEDMSG1131 */
0, /* REQRECOV */
0, /* JNLTRANS2BIG */
0, /* JNLSWITCHTOOSM */
0, /* JNLSWITCHSZCHG */
@ -1088,7 +1088,7 @@ const static readonly int error_ansi[] = {
0, /* REPLINSTSEQORD */
0, /* REPLINSTSTNDALN */
0, /* REPLREQROLLBACK */
0, /* UNUSEDMSG1255 */
0, /* REQROLLBACK */
0, /* UNUSEDMSG1256 */
0, /* SRCSRVEXISTS */
0, /* SRCSRVNOTEXIST */
@ -1246,12 +1246,12 @@ const static readonly int error_ansi[] = {
0, /* NORESYNCUPDATERONLY */
0, /* NOSUPPLSUPPL */
0, /* REPL2OLD */
0, /* RCVR2MANY */
0, /* RLBKCONFIGBNDRY */
0, /* UNUSEDMSG1413 */
0, /* UNUSEDMSG1414 */
0, /* SECNOTSUPPLEMENTARY */
0, /* SUPRCVRNEEDSSUPSRC */
0, /* SYNCTOSAMETYPE */
0, /* TARGINSRUNNING */
0, /* UNUSEDMSG1417 */
0, /* UNUSEDMSG1418 */
0, /* UPDSYNC2MTINS */
0, /* UPDSYNCINSTFILE */
0, /* REUSEINSTNAME */
@ -1270,7 +1270,7 @@ const static readonly int error_ansi[] = {
0, /* ORLBKNOV4BLK */
0, /* DBROLLEDBACK */
0, /* DSEWCREINIT */
0, /* RNDWNSKIPCNT */
0, /* UNUSEDMSG1437 */
0, /* REPLONLNRLBK */
0, /* SRVLCKWT2LNG */
0, /* IGNBMPMRKFREE */
@ -1293,4 +1293,35 @@ const static readonly int error_ansi[] = {
0, /* STRMSEQMISMTCH */
0, /* LOCKSPACEINFO */
0, /* JRTNULLFAIL */
0, /* LOCKSUB2LONG */
0, /* RESRCWAIT */
0, /* RESRCINTRLCKBYPAS */
0, /* DBFHEADERRANY */
0, /* REPLINSTFROZEN */
0, /* REPLINSTFREEZECOMMENT */
0, /* REPLINSTUNFROZEN */
0, /* DSKNOSPCAVAIL */
0, /* DSKNOSPCBLOCKED */
0, /* DSKSPCAVAILABLE */
0, /* ENOSPCQIODEFER */
0, /* CUSTOMFILOPERR */
0, /* CUSTERRNOTFND */
0, /* CUSTERRSYNTAX */
0, /* ORLBKINPROG */
0, /* DBSPANGLOINCMP */
0, /* DBSPANCHUNKORD */
0, /* DBDATAMX */
0, /* DBIOERR */
0, /* INITORRESUME */
0, /* GTMSECSHRNOARG0 */
0, /* GTMSECSHRISNOT */
0, /* GTMSECSHRBADDIR */
0, /* JNLBUFFREGUPD */
0, /* JNLBUFFDBUPD */
0, /* LOCKINCR2HIGH */
0, /* LOCKIS */
0, /* LDSPANGLOINCMP */
0, /* MUFILRNDWNFL2 */
0, /* MUINSTFROZEN */
0, /* MUINSTUNFROZEN */
};

132
sr_unix/merrors_ctl.c → sr_arm/merrors_ctl.c
View File

@ -305,8 +305,8 @@ LITDEF err_msg merrors[] = {
"DBBLEVMN", "!AD Block level less than zero", 2,
"DBBSIZMN", "!AD Block too small", 2,
"DBBSIZMX", "!AD Block larger than file block size", 2,
"DBRSIZMN", "!AD Record too small", 2,
"DBRSIZMX", "!AD Record too large", 2,
"DBRSIZMN", "!AD Physical record too small", 2,
"DBRSIZMX", "!AD Physical record too large", 2,
"DBCMPNZRO", "!AD First record of block has nonzero compression count", 2,
"DBSTARSIZ", "!AD Star record has wrong size", 2,
"DBSTARCMP", "!AD Star record has nonzero compression count", 2,
@ -429,8 +429,8 @@ LITDEF err_msg merrors[] = {
"JNLINVEXT", "Journal file extension !UL is greater than the maximum allowed size of !UL. Journal file not created.", 2,
"MUPCLIERR", "Action not taken due to CLI errors", 0,
"JNLTMQUAL4", "Time qualifier BEFORE_TIME=\"!AZ\" is less than AFTER_TIME=\"!AZ\"", 2,
"JNLBUFFTOOLG", "Journal file buffer !UL is greater than the maximum allowed size of !UL. Journal file not created.", 2,
"JNLBUFFTOOSM", "Journal file buffer !UL is less than minimum of database block size in 512 byte pages + 1 (!UL)", 2,
"UNUSEDMSG594", "JNLBUFFTOOLG Last used in V5.5-000", 0,
"UNUSEDMSG595", "JNLBUFFTOOSM Last used in V5.5-000", 0,
"MUNODBNAME", "A database name or the region qualifier must be specified", 0,
"FILECREATE", "!AD file !AD created", 4,
"FILENOTCREATE", "!AD file !AD not created", 4,
@ -505,7 +505,7 @@ LITDEF err_msg merrors[] = {
"CENOINDIR", "Indirection type information not available for compiler escape feature", 0,
"COLLATIONUNDEF", "Collation type !UL is not defined", 1,
"RBWRNNOTCHG", "Not all specified database files were changed", 0,
"GTMSECSHRSRVF", "!AD - !UL : Attempt to service request failed", 3,
"GTMSECSHRSRVF", "!AD - !UL : Attempt to service request failed (retry = !UL)", 4,
"FREEZECTRL", "Control Y or control C encountered during attempt to freeze the database. Aborting freeze.", 0,
"JNLFLUSH", "Error flushing journal buffers to journal file !AD", 2,
"CCPSIGDMP", "CCP non fatal dump, continuing operation. Report to your GT.M Support Channel.", 0,
@ -583,11 +583,11 @@ LITDEF err_msg merrors[] = {
"BLKSIZ512", "Block size !UL rounds to !UL", 2,
"MUTEXERR", "Mutual Exclusion subsystem failure", 0,
"JNLVSIZE", "Journal File !AD has incorrect virtual_filesize !UL. Allocation : !UL, Extension : !UL, Filesize : !UL, File system block size : !UL", 7,
"MUTEXLCKALERT", "Mutual Exclusion subsystem ALERT - lock attempt threshold crossed for region !AD. Process !UL is in crit.", 3,
"MUTEXLCKALERT", "Mutual Exclusion subsystem ALERT - lock attempt threshold crossed for region !AD. Process !UL is in crit cycle !UL.", 4,
"MUTEXFRCDTERM", "Mutual Exclusion subsystem detected forced termination of process !UL. Crit salvaged from region !AD.", 3,
"GTMSECSHR", "!UL : Error during gtmsecshr operation", 1,
"GTMSECSHRSRVFID", "!AD: !UL - Attempt to service request failed.!/ client id: !UL, mesg type: !UL, mesg data: !UL.", 6,
"GTMSECSHRSRVFIL", "!AD: !UL - Attempt to service request failed.!/ client id: !UL, mesg type: !UL!/file: !AD.", 7,
"GTMSECSHRSRVFID", "!AD: !UL - Attempt to service request failed.!/ client id: !UL, mesg type: !UL, mesg data: !UL", 6,
"GTMSECSHRSRVFIL", "!AD: !UL - Attempt to service request failed.!/ client id: !UL, mesg type: !UL!/file: !AD", 7,
"SOCKACTNA", "Action not appropriate for current socket", 0,
"PROTNOTSUP", "Protocol !AD not supported", 2,
"DELIMSIZNA", "Delimiter size is not appropriate", 0,
@ -644,7 +644,7 @@ LITDEF err_msg merrors[] = {
"JNLRDONLY", "Journal file !AD read only", 2,
"ANCOMPTINC", "Deviceparameter !AD is not compatible with any other deviceparameters in the !AD command", 4,
"ABNCOMPTINC", "Deviceparameter !AD and deviceparameter !AD are not compatible in the !AD command", 6,
"GTMSECSHRLOGF", "!AD - !UL : Error while creating gtmsecshr log file", 3,
"UNUSEDMSG809", "GTMSECSHRLOGF last used in V5.5-000", 0,
"SOCKNOTFND", "Socket !AD not found", 2,
"CURRSOCKOFR", "Current socket of index !UL is out of range. There are only !UL sockets.", 2,
"SOCKETEXIST", "Socket !AD already exists", 2,
@ -733,8 +733,8 @@ LITDEF err_msg merrors[] = {
"SCNDDBNOUPD", "Database Updates not allowed on the secondary", 0,
"MUINFOUINT4", "!AD : !UL [0x!XL]", 4,
"NLMISMATCHCALC", "Location of !AD expected at 0x!XL, but found at 0x!XL", 4,
"GTMSECSHRLOGSWH", "Error switching gtmsecshr log file gtmsecshr log -- !AD original log -- !AD error phase -- !AD process id -- !UL", 7,
"GTMSECSHRDEFLOG", "$gtm_log is either undefined or not defined to an absolute path, thus gtm_log is set to its default !AD", 2,
"UNUSEDMSG898", "GTMSECSHRLOGSWH last used in V5.5-000", 0,
"UNUSEDMSG899", "GTMSECSHRDEFLOG last used in V5.5-000", 0,
"DBBADNSUB", "!AD Bad numeric subscript", 2,
"DBBADKYNM", "!AD Bad key name", 2,
"DBBADPNTR", "!AD Bad pointer value in directory", 2,
@ -813,8 +813,8 @@ LITDEF err_msg merrors[] = {
"DBADDRANGE8", "Database file !AD, element location 0x!XJ: blk = 0x!XL: control 0x!16@XQ was outside !AD range 0x!16@XQ to 0x!16@XQ", 9,
"RNDWNSEMFAIL", "Attempting to acquire gds_rundown semaphore when it is already owned", 0,
"GTMSECSHRSHUTDN", "gtmsecshr process has received a shutdown request -- shutting down", 0,
"NOSPACECRE", "Not enough space to create database file !AD. !UL blocks are needed, only !UL available.", 4,
"LOWSPACECRE", "Disk space for database file !AD is not enough for !UL future extensions. !UL !UL-byte blocks are needed, only !UL available.", 6,
"NOSPACECRE", "Not enough space to create database file !AD. !@ZQ blocks are needed, only !@ZQ available.", 4,
"LOWSPACECRE", "Disk space for database file !AD is not enough for !UL future extensions. !@ZQ !UL-byte blocks are needed, only !@ZQ available.", 6,
"WAITDSKSPACE", "Process 0x!XL will wait !UL seconds for necessary disk space to become available for !AD ", 4,
"OUTOFSPACE", "Database file !AD ran out of disk space. Detected by process !UL. !/Exit without clearing shared memory due to the disk space constraints. !/Make space and then perform mupip rundown to ensure database integrity.", 3,
"JNLPVTINFO", "Pid 0x!XL!/ cycle 0x!XL fd_mismatch 0x!XL channel 0x!XL sync_io 0x!XL!/ pini_addr 0x!XL qio_active 0x!XL old_channel 0x!XL", 8,
@ -966,7 +966,7 @@ LITDEF err_msg merrors[] = {
"PREVJNLLINKCUT", "Previous journal file name link set to NULL in new journal file !AD created for database file !AD", 4,
"PREVJNLLINKSET", "Previous generation journal file name is changed from !AD to !AD", 4,
"FILENAMETOOLONG", "File name too long", 0,
"UNUSEDMSG1131", "JNLCREATERR Last used in V5.4-001", 0,
"REQRECOV", "Error accessing database !AD. Must be recovered on cluster node !AD.", 4,
"JNLTRANS2BIG", "Transaction needs an estimated [!UL blocks] in journal file !AD which exceeds the AUTOSWITCHLIMIT of !UL blocks", 4,
"JNLSWITCHTOOSM", "Journal AUTOSWITCHLIMIT [!UL blocks] is less than Journal ALLOCATION [!UL blocks] for database file !AD", 4,
"JNLSWITCHSZCHG", "Journal AUTOSWITCHLIMIT [!UL blocks] is rounded down to [!UL blocks] to equal the sum of Journal ALLOCATION [!UL blocks] and a multiple of Journal EXTENSION [!UL blocks] for database file !AD", 6,
@ -1090,7 +1090,7 @@ LITDEF err_msg merrors[] = {
"REPLINSTSEQORD", "!AD has seqno [0x!16@XQ] which is less than last record seqno [0x!16@XQ] in replication instance file !AD", 6,
"REPLINSTSTNDALN", "Could not get exclusive access to replication instance file !AD", 2,
"REPLREQROLLBACK", "Replication instance file !AD indicates abnormal shutdown or an incomplete ROLLBACK. Run MUPIP JOURNAL ROLLBACK first", 2,
"UNUSEDMSG1255", "REPLUPGRADEPRI : Last used in V5.4-002B", 0,
"REQROLLBACK", "Error accessing database !AD. Run MUPIP JOURNAL ROLLBACK on cluster node !AD.", 4,
"UNUSEDMSG1256", "REPLUPGRADESEC : Last used in V5.4-002B", 0,
"SRCSRVEXISTS", "Source server for secondary instance !AD is already running with pid !UL", 3,
"SRCSRVNOTEXIST", "Source server for secondary instance !AD is not alive", 2,
@ -1132,7 +1132,7 @@ LITDEF err_msg merrors[] = {
"COMMITWAITPID", "Pid !UL waited !UL minute(s) for pid !UL to finish commits to block 0x!XL in database file !AD", 6,
"UPDREPLSTATEOFF", "Error replicating global ^!AD as it maps to database !AD which has replication turned OFF", 4,
"LITNONGRAPH", "M standard requires graphics in string literals", 0,
"DBFHEADERR8", "Database file !AD: control problem: !AD was 0x!XJ expecting 0x!XJ", 6,
"DBFHEADERR8", "Database file !AD: control problem: !AD was 0x!16@XQ expecting 0x!16@XQ", 6,
"MMBEFOREJNL", "BEFORE image journaling cannot be set with MM access method in database file !AD", 2,
"MMNOBFORRPL", "Replication cannot be used in database file !AD which uses MM access method and NOBEFORE image journaling", 2,
"KILLABANDONED", "Abandoned kills counter is greater than zero for file !AD, !AD", 4,
@ -1248,12 +1248,12 @@ LITDEF err_msg merrors[] = {
"NORESYNCUPDATERONLY", "NORESYNC qualifier only allowed on a Supplementary Instance which allows local updates", 0,
"NOSUPPLSUPPL", "Instance !AD is configured to perform local updates so it cannot receive from Supplementary Instance !AD", 4,
"REPL2OLD", "Instance !AD uses a GT.M version that does not support connection with the current version on instance !AD", 4,
"RCVR2MANY", "The instance already has the maximum supportable number of receiver servers [!UL] active", 1,
"RLBKCONFIGBNDRY", "Rollback encountered journal records indicating current source !AD replaced old source !AD; cannot rollback past sequence number 0x!16@XQ", 5,
"UNUSEDMSG1413", "RCVR2MANY: Never used before so slot free for reuse", 0,
"UNUSEDMSG1414", "RLBKCONFIGBNDRY: Never used before so slot free for reuse", 0,
"SECNOTSUPPLEMENTARY", "!AD is a Supplementary Instance and so cannot act as a source to non-Supplementary Instance !AD ", 4,
"SUPRCVRNEEDSSUPSRC", "Instance !AD is not configured to perform local updates so it cannot act as a receiver for non-Supplementary Instance !AD", 4,
"SYNCTOSAMETYPE", "Source instance !AD and receiver instance !AD must either be both supplementary or both non-supplementary for them to synchronize their state", 4,
"TARGINSRUNNING", "Cannot change the instance definition of instance !AD while it is running", 2,
"UNUSEDMSG1417", "SYNCTOSAMETYPE: Never used before so slot free for reuse", 0,
"UNUSEDMSG1418", "TARGINSRUNNING: Never used before so slot free for reuse", 0,
"UPDSYNC2MTINS", "Can only UPDATERESYNC with an empty instance file", 0,
"UPDSYNCINSTFILE", "Error with instance file name specified in UPDATERESYNC qualifier", 0,
"REUSEINSTNAME", "Error with instance name specified in REUSE qualifier", 0,
@ -1272,7 +1272,7 @@ LITDEF err_msg merrors[] = {
"ORLBKNOV4BLK", "Region !AD (!AD) has V4 format blocks. Database upgrade required. ONLINE ROLLBACK cannot continue", 4,
"DBROLLEDBACK", "Concurrent ONLINE ROLLBACK detected on one or more regions. The current operation is no longer valid", 0,
"DSEWCREINIT", "Database cache reinitialized by DSE for region !AD", 2,
"RNDWNSKIPCNT", "A total of !UL process(es) skipped database rundown due to a concurrent ONLINE ROLLBACK", 1,
"UNUSEDMSG1437", "A total of !UL process(es) skipped database rundown due to a concurrent ONLINE ROLLBACK", 1,
"REPLONLNRLBK", "ONLINE ROLLBACK detected. Starting afresh", 0,
"SRVLCKWT2LNG", "PID !UL is holding the source server lock. Waited for !UL minute(s). Now exiting", 2,
"IGNBMPMRKFREE", "Ignoring bitmap free-up operation for region !AD (!AD) due to concurrent ONLINE ROLLBACK", 4,
@ -1295,6 +1295,37 @@ LITDEF err_msg merrors[] = {
"STRMSEQMISMTCH", "Unable to play update on Stream !2UL with seqno [0x!16@XQ] as receiving instance has a different stream seqno [0x!16@XQ]", 3,
"LOCKSPACEINFO", "Region: !AD: processes on queue: !UL/!UL; LOCK slots in use: !UL/!UL; name space!ADfull", 8,
"JRTNULLFAIL", "Applying NULL journal record failed. Failure code: !AD.", 2,
"LOCKSUB2LONG", "Following subscript is !UL bytes long which exceeds 255 byte limit.", 1,
"RESRCWAIT", "Waiting briefly for the !AD semaphore for region !AD (!AD) was held by PID !UL (Sem. ID: !UL).", 8,
"RESRCINTRLCKBYPAS", "!AD with PID !UL bypassing the !AD semaphore for region !AD (!AD) was held by PID !UL.", 10,
"DBFHEADERRANY", "Database file !AD: control problem: !AD was 0x!XJ expecting 0x!XJ", 6,
"REPLINSTFROZEN", "Instance !AZ is now Frozen", 1,
"REPLINSTFREEZECOMMENT", "Freeze Comment: !AZ", 1,
"REPLINSTUNFROZEN", "Instance !AZ is now Unfrozen", 1,
"DSKNOSPCAVAIL", "Attempted write to file !AD failed due to lack of disk space. Retrying indefinitely.", 2,
"DSKNOSPCBLOCKED", "Retry of write to file !AD suspended due to new instance freeze. Waiting for instance to be unfrozen.", 2,
"DSKSPCAVAILABLE", "Write to file !AD succeeded after out-of-space condition cleared", 2,
"ENOSPCQIODEFER", "Write to file !AD deferred due to lack of disk space", 2,
"CUSTOMFILOPERR", "Error while doing !AD operation on file !AD", 4,
"CUSTERRNOTFND", "Error mnemonic !AD specified in custom errors file is not valid for this version of GT.M", 2,
"CUSTERRSYNTAX", "Syntax error in file !AD at line number !UL", 3,
"ORLBKINPROG", "Online ROLLBACK in progress by PID !UL in region !AD", 3,
"DBSPANGLOINCMP", "!AD Spanning node is missing. Block no !UL of spanning node is missing", 3,
"DBSPANCHUNKORD", "!AD Chunk of !UL blocks is out of order", 3,
"DBDATAMX", "!AD Record too large", 2,
"DBIOERR", "Error while doing write operation on region !AD (!AD)", 4,
"INITORRESUME", "UPDATERESYNC on a Supplementary Instance must additionally specify INITIALIZE or RESUME", 0,
"GTMSECSHRNOARG0", "gtmsecshr cannot identify its origin - argv[0] is null", 0,
"GTMSECSHRISNOT", "gtmsecshr is not running as gtmsecshr but !AD - must be gtmsecshr", 2,
"GTMSECSHRBADDIR", "gtmsecshr is not running from $gtm_dist/gtmsecshrdir or $gtm_dist cannot be determined", 0,
"JNLBUFFREGUPD", "Journal file buffer size for region !AD has been adjusted from !UL to !UL.", 4,
"JNLBUFFDBUPD", "Journal file buffer size for database file !AD has been adjusted from !UL to !UL.", 4,
"LOCKINCR2HIGH", "Attempt to increment a LOCK more than !UL times", 1,
"LOCKIS", "!_!_Resource name: !AD", 2,
"LDSPANGLOINCMP", "Incomplete spanning node found during load", 0,
"MUFILRNDWNFL2", "Database section (id = !UL) belonging to database file !AD rundown failed", 3,
"MUINSTFROZEN", "!AD : Instance !AZ is frozen. Waiting for instance to be unfrozen before proceeding with writes to database file !AD", 5,
"MUINSTUNFROZEN", "!AD : Instance !AZ is now Unfrozen. Continuing with writes to database file !AD", 5,
};
LITDEF int ERR_ACK = 150372361;
@ -1383,7 +1414,7 @@ LITDEF int ERR_INDMAXNEST = 150373018;
LITDEF int ERR_INDRMAXLEN = 150373026;
LITDEF int ERR_INSFFBCNT = 150373034;
LITDEF int ERR_INTEGERRS = 150373042;
LITDEF int ERR_INVCMD = 150373050;
LITDEF int ERR_INVCMD = 150373048;
LITDEF int ERR_INVFCN = 150373058;
LITDEF int ERR_INVOBJ = 150373066;
LITDEF int ERR_INVSVN = 150373074;
@ -1713,8 +1744,8 @@ LITDEF int ERR_JNLINVALLOC = 150375656;
LITDEF int ERR_JNLINVEXT = 150375664;
LITDEF int ERR_MUPCLIERR = 150375674;
LITDEF int ERR_JNLTMQUAL4 = 150375682;
LITDEF int ERR_JNLBUFFTOOLG = 150375688;
LITDEF int ERR_JNLBUFFTOOSM = 150375696;
LITDEF int ERR_UNUSEDMSG594 = 150375690;
LITDEF int ERR_UNUSEDMSG595 = 150375698;
LITDEF int ERR_MUNODBNAME = 150375706;
LITDEF int ERR_FILECREATE = 150375715;
LITDEF int ERR_FILENOTCREATE = 150375723;
@ -1928,7 +1959,7 @@ LITDEF int ERR_MUKILLIP = 150377376;
LITDEF int ERR_JNLRDONLY = 150377386;
LITDEF int ERR_ANCOMPTINC = 150377394;
LITDEF int ERR_ABNCOMPTINC = 150377402;
LITDEF int ERR_GTMSECSHRLOGF = 150377410;
LITDEF int ERR_UNUSEDMSG809 = 150377410;
LITDEF int ERR_SOCKNOTFND = 150377418;
LITDEF int ERR_CURRSOCKOFR = 150377426;
LITDEF int ERR_SOCKETEXIST = 150377434;
@ -2017,8 +2048,8 @@ LITDEF int ERR_SECONDAHEAD = 150378090;
LITDEF int ERR_SCNDDBNOUPD = 150378098;
LITDEF int ERR_MUINFOUINT4 = 150378107;
LITDEF int ERR_NLMISMATCHCALC = 150378114;
LITDEF int ERR_GTMSECSHRLOGSWH = 150378122;
LITDEF int ERR_GTMSECSHRDEFLOG = 150378131;
LITDEF int ERR_UNUSEDMSG898 = 150378122;
LITDEF int ERR_UNUSEDMSG899 = 150378131;
LITDEF int ERR_DBBADNSUB = 150378138;
LITDEF int ERR_DBBADKYNM = 150378146;
LITDEF int ERR_DBBADPNTR = 150378154;
@ -2250,7 +2281,7 @@ LITDEF int ERR_JNLFNF = 150379955;
LITDEF int ERR_PREVJNLLINKCUT = 150379963;
LITDEF int ERR_PREVJNLLINKSET = 150379971;
LITDEF int ERR_FILENAMETOOLONG = 150379978;
LITDEF int ERR_UNUSEDMSG1131 = 150379986;
LITDEF int ERR_REQRECOV = 150379986;
LITDEF int ERR_JNLTRANS2BIG = 150379994;
LITDEF int ERR_JNLSWITCHTOOSM = 150380002;
LITDEF int ERR_JNLSWITCHSZCHG = 150380011;
@ -2374,7 +2405,7 @@ LITDEF int ERR_REPLINSTSECUNDF = 150380946;
LITDEF int ERR_REPLINSTSEQORD = 150380954;
LITDEF int ERR_REPLINSTSTNDALN = 150380962;
LITDEF int ERR_REPLREQROLLBACK = 150380970;
LITDEF int ERR_UNUSEDMSG1255 = 150380978;
LITDEF int ERR_REQROLLBACK = 150380978;
LITDEF int ERR_UNUSEDMSG1256 = 150380986;
LITDEF int ERR_SRCSRVEXISTS = 150380994;
LITDEF int ERR_SRCSRVNOTEXIST = 150381002;
@ -2532,12 +2563,12 @@ LITDEF int ERR_NORESYNCSUPPLONLY = 150382210;
LITDEF int ERR_NORESYNCUPDATERONLY = 150382218;
LITDEF int ERR_NOSUPPLSUPPL = 150382226;
LITDEF int ERR_REPL2OLD = 150382234;
LITDEF int ERR_RCVR2MANY = 150382242;
LITDEF int ERR_RLBKCONFIGBNDRY = 150382250;
LITDEF int ERR_UNUSEDMSG1413 = 150382243;
LITDEF int ERR_UNUSEDMSG1414 = 150382251;
LITDEF int ERR_SECNOTSUPPLEMENTARY = 150382258;
LITDEF int ERR_SUPRCVRNEEDSSUPSRC = 150382266;
LITDEF int ERR_SYNCTOSAMETYPE = 150382274;
LITDEF int ERR_TARGINSRUNNING = 150382282;
LITDEF int ERR_UNUSEDMSG1417 = 150382275;
LITDEF int ERR_UNUSEDMSG1418 = 150382283;
LITDEF int ERR_UPDSYNC2MTINS = 150382290;
LITDEF int ERR_UPDSYNCINSTFILE = 150382298;
LITDEF int ERR_REUSEINSTNAME = 150382306;
@ -2556,7 +2587,7 @@ LITDEF int ERR_ORLBKFRZOVER = 150382403;
LITDEF int ERR_ORLBKNOV4BLK = 150382410;
LITDEF int ERR_DBROLLEDBACK = 150382418;
LITDEF int ERR_DSEWCREINIT = 150382427;
LITDEF int ERR_RNDWNSKIPCNT = 150382435;
LITDEF int ERR_UNUSEDMSG1437 = 150382435;
LITDEF int ERR_REPLONLNRLBK = 150382442;
LITDEF int ERR_SRVLCKWT2LNG = 150382450;
LITDEF int ERR_IGNBMPMRKFREE = 150382459;
@ -2579,9 +2610,40 @@ LITDEF int ERR_STRMNUMMISMTCH2 = 150382586;
LITDEF int ERR_STRMSEQMISMTCH = 150382594;
LITDEF int ERR_LOCKSPACEINFO = 150382603;
LITDEF int ERR_JRTNULLFAIL = 150382610;
LITDEF int ERR_LOCKSUB2LONG = 150382618;
LITDEF int ERR_RESRCWAIT = 150382627;
LITDEF int ERR_RESRCINTRLCKBYPAS = 150382635;
LITDEF int ERR_DBFHEADERRANY = 150382643;
LITDEF int ERR_REPLINSTFROZEN = 150382650;
LITDEF int ERR_REPLINSTFREEZECOMMENT = 150382659;
LITDEF int ERR_REPLINSTUNFROZEN = 150382667;
LITDEF int ERR_DSKNOSPCAVAIL = 150382675;
LITDEF int ERR_DSKNOSPCBLOCKED = 150382682;
LITDEF int ERR_DSKSPCAVAILABLE = 150382691;
LITDEF int ERR_ENOSPCQIODEFER = 150382699;
LITDEF int ERR_CUSTOMFILOPERR = 150382706;
LITDEF int ERR_CUSTERRNOTFND = 150382714;
LITDEF int ERR_CUSTERRSYNTAX = 150382722;
LITDEF int ERR_ORLBKINPROG = 150382731;
LITDEF int ERR_DBSPANGLOINCMP = 150382738;
LITDEF int ERR_DBSPANCHUNKORD = 150382746;
LITDEF int ERR_DBDATAMX = 150382754;
LITDEF int ERR_DBIOERR = 150382762;
LITDEF int ERR_INITORRESUME = 150382770;
LITDEF int ERR_GTMSECSHRNOARG0 = 150382778;
LITDEF int ERR_GTMSECSHRISNOT = 150382786;
LITDEF int ERR_GTMSECSHRBADDIR = 150382794;
LITDEF int ERR_JNLBUFFREGUPD = 150382800;
LITDEF int ERR_JNLBUFFDBUPD = 150382808;
LITDEF int ERR_LOCKINCR2HIGH = 150382818;
LITDEF int ERR_LOCKIS = 150382827;
LITDEF int ERR_LDSPANGLOINCMP = 150382834;
LITDEF int ERR_MUFILRNDWNFL2 = 150382843;
LITDEF int ERR_MUINSTFROZEN = 150382851;
LITDEF int ERR_MUINSTUNFROZEN = 150382859;
GBLDEF err_ctl merrors_ctl = {
246,
"GTM",
&merrors[0],
1282};
1313};

32
sr_arm/mint2mval.s Normal file
View File

@ -0,0 +1,32 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global mint2mval
.type mint2mval, %function
mint2mval:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size mint2mval, .-mint2mval

18
sr_unix/util_help.h → sr_arm/mum_tstart.c
View File

@ -1,6 +1,6 @@
/****************************************************************
* *
* Copyright 2013 Fidelity Information Services, Inc *
* Copyright 2001, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
@ -9,8 +9,14 @@
* *
****************************************************************/
#ifndef UTIL_HELP_INCLUDED
#define UTIL_HELP_INCLUDED
void util_help(void);
#endif
int mum_tstart(void)
{
if(1)
{
getframe();
} else
{
trans_code();
}
return 0;
}

28
sr_arm/mum_tstart.s Normal file
View File

@ -0,0 +1,28 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global mum_tstart_arm
.type mum_tstart_arm, %function
mum_tstart_arm:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size mum_tstart_arm, .-mum_tstart_arm

32
sr_arm/mval2bool.s Normal file
View File

@ -0,0 +1,32 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global mval2bool
.type mval2bool, %function
mval2bool:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size mval2bool, .-mval2bool

32
sr_arm/mval2mint.s Normal file
View File

@ -0,0 +1,32 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global mval2mint
.type mval2mint, %function
mval2mint:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size mval2mint, .-mval2mint

32
sr_arm/mval2num.s Normal file
View File

@ -0,0 +1,32 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global mval2num
.type mval2num, %function
mval2num:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
sub sp, sp, #12
str r0, [fp, #-8]
ldr r3, [fp, #-8]
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size mval2num, .-mval2num

479
sr_arm/obj_file.c Normal file
View File

@ -0,0 +1,479 @@
/****************************************************************
* *
* Copyright 2001, 2009 Fidelity Information Services, Inc *
* *
* This source code contains the intellectual property *
* of its copyright holder(s), and is made available *
* under a license. If you do not know the terms of *
* the license, please stop and do not read further. *
* *
****************************************************************/
#include "mdef.h"
#include "gtm_string.h"
#include <errno.h>
#include "compiler.h"
#include <rtnhdr.h>
#include "obj_gen.h"
#include "cgp.h"
#include "mdq.h"
#include "cmd_qlf.h"
#include "objlabel.h" /* needed for masscomp.h */
#include "masscomp.h"
#include "stringpool.h"
#include "parse_file.h"
#include "gtm_fcntl.h"
#include "gtm_unistd.h"
#include "gtmio.h"
#include "mmemory.h"
#include "obj_file.h"
LITREF char gtm_release_name[];
LITREF int4 gtm_release_name_len;
GBLREF mliteral literal_chain;
GBLREF char source_file_name[];
GBLREF unsigned short source_name_len;
GBLREF command_qualifier cmd_qlf;
GBLREF mident routine_name;
GBLREF mident module_name;
GBLREF boolean_t run_time;
GBLREF int4 mlmax, mvmax;
GBLREF int4 code_size, lit_addrs, lits_size;
GBLDEF int4 psect_use_tab[GTM_LASTPSECT]; /* bytes of each psect in this module */
GBLREF char object_file_name[];
GBLREF short object_name_len;
GBLREF int object_file_des;
static short int current_psect;
static char emit_buff[OBJ_EMIT_BUF_SIZE]; /* buffer for emit output */
static short int emit_buff_used; /* number of chars in emit_buff */
GBLREF uint4 txtrel_cnt;
static uint4 cdlits;
static struct rel_table *data_rel, *data_rel_end;
static struct rel_table *text_rel, *text_rel_end;
DEBUG_ONLY(static uint4 txtrel_cnt_in_hdr;)
error_def(ERR_OBJFILERR);
void create_object_file(rhdtyp *rhead)
{
int status;
unsigned char rout_len;
uint4 stat;
char obj_name[SIZEOF(mident_fixed) + 5];
mstr fstr;
parse_blk pblk;
struct exec hdr;
error_def(ERR_FILEPARSE);
assert(!run_time);
memset(&pblk, 0, SIZEOF(pblk));
pblk.buffer = object_file_name;
pblk.buff_size = MAX_FBUFF;
/* create the object file */
fstr.len = (MV_DEFINED(&cmd_qlf.object_file) ? cmd_qlf.object_file.str.len : 0);
fstr.addr = cmd_qlf.object_file.str.addr;
rout_len = module_name.len;
memcpy(&obj_name[0], module_name.addr, rout_len);
obj_name[rout_len] = '.';
obj_name[rout_len + 1] = 'o';
obj_name[rout_len + 2] = 0;
pblk.def1_size = rout_len + 2;
pblk.def1_buf = obj_name;
status = parse_file(&fstr, &pblk);
if (!(status & 1))
rts_error(VARLSTCNT(5) ERR_FILEPARSE, 2, fstr.len, fstr.addr, status);
object_name_len = pblk.b_esl;
object_file_name[object_name_len] = 0;
OPEN_OBJECT_FILE(object_file_name, O_CREAT | O_RDWR, object_file_des);
if (FD_INVALID == object_file_des)
rts_error(VARLSTCNT(5) ERR_OBJFILERR, 2, object_name_len, object_file_name, errno);
memcpy(&rhead->jsb[0], "GTM_CODE", SIZEOF(rhead->jsb));
emit_addr((char *)&rhead->src_full_name.addr - (char *)rhead,
(int4)rhead->src_full_name.addr, (int4 *)&rhead->src_full_name.addr);
emit_addr((char *)&rhead->routine_name.addr - (char *)rhead,
(int4)rhead->routine_name.addr, (int4 *)&rhead->routine_name.addr);
txtrel_cnt += 2;
DEBUG_ONLY(txtrel_cnt_in_hdr = txtrel_cnt;)
set_psect(GTM_CODE, 0);
hdr.a_magic = OMAGIC;
hdr.a_stamp = OBJ_LABEL;
hdr.a_entry = 0;
hdr.a_bss = 0;
hdr.a_text = code_size;
assert(0 == PADLEN(lits_size, NATIVE_WSIZE));
hdr.a_data = lits_size; /* and pad to even # */
hdr.a_syms = (mlmax + cdlits) * SIZEOF(struct nlist);
hdr.a_trsize = txtrel_cnt * SIZEOF(struct relocation_info);
hdr.a_drsize = lit_addrs * SIZEOF(struct relocation_info);
emit_immed((char *)&hdr, SIZEOF(hdr));
memset(psect_use_tab, 0, SIZEOF(psect_use_tab));
emit_immed((char *)rhead, SIZEOF(*rhead));
}
void close_object_file(void)
{
assert(0 == PADLEN(lits_size, NATIVE_WSIZE));
resolve_sym();
output_relocation();
output_symbol();
if (emit_buff_used)
buff_emit();
if ((off_t)-1 == lseek(object_file_des, (off_t)0, SEEK_SET))
rts_error(VARLSTCNT(5) ERR_OBJFILERR, 2, object_name_len, object_file_name, errno);
}
void drop_object_file(void)
{
int rc;
if (FD_INVALID != object_file_des)
{
UNLINK(object_file_name);
CLOSEFILE_RESET(object_file_des, rc); /* resets "object_file_des" to FD_INVALID */
}
}
GBLREF spdesc stringpool;
void emit_addr(int4 refaddr, int4 offset, int4 *result)
{
struct rel_table *newrel;
if (run_time)
{
unsigned char *ptr;
ptr = stringpool.free;
*result = offset - (int4) ptr;
} else
{ *result = offset + code_size;
newrel = (struct rel_table *) mcalloc(SIZEOF(struct rel_table));
newrel->next = (struct rel_table *) 0;
newrel->resolve = 0;
newrel->r.r_address = refaddr;
newrel->r.r_symbolnum = N_DATA;
newrel->r.r_pcrel = 0;
newrel->r.r_length = 2;
newrel->r.r_extern = 0;
newrel->r.r_pad = 0;
if (!text_rel)
text_rel = text_rel_end = newrel;
else
{ text_rel_end->next = newrel;
text_rel_end = newrel;
}
}
return;
}
void emit_pidr(int4 refoffset, int4 data_offset, int4 *result)
{
struct rel_table *newrel;
assert(!run_time);
refoffset += code_size;
data_offset += code_size;
*result = data_offset;
newrel = (struct rel_table *) mcalloc(SIZEOF(struct rel_table));
newrel->next = (struct rel_table *)0;
newrel->resolve = 0;
newrel->r.r_address = refoffset;
newrel->r.r_symbolnum = N_DATA;
newrel->r.r_pcrel = 0;
newrel->r.r_length = 2;
newrel->r.r_extern = 0;
newrel->r.r_pad = 0;
if (!data_rel)
data_rel = data_rel_end = newrel;
else
{ data_rel_end->next = newrel;
data_rel_end = newrel;
}
}
void emit_reference(uint4 refaddr, mstr *name, uint4 *result)
{
struct sym_table *sym;
struct rel_table *newrel;
sym = define_symbol(0, name, 0);
assert(sym);
if (sym->n.n_type == (N_TEXT | N_EXT))
*result = sym->n.n_value;
else
{
newrel = (struct rel_table *) mcalloc(SIZEOF(struct rel_table));
newrel->next = (struct rel_table *)0;
newrel->resolve = 0;
newrel->r.r_address = refaddr;
newrel->r.r_symbolnum = 0;
newrel->r.r_pcrel = 0;
newrel->r.r_length = 2;
newrel->r.r_extern = 1;
newrel->r.r_pad = 0;
if (!text_rel)
text_rel = text_rel_end = newrel;
else
{ text_rel_end->next = newrel;
text_rel_end = newrel;
}
if (sym->resolve)
newrel->resolve = sym->resolve;
sym->resolve = newrel;
*result = 0;
}
}
/*
* emit_immed
*
* Args: buffer of executable code, and byte count to be output.
*/
error_def(ERR_STRINGOFLOW);
void emit_immed(char *source, uint4 size)
{
short int write;
if (run_time)
{
if (stringpool.free + size > stringpool.top)
rts_error(VARLSTCNT(1) ERR_STRINGOFLOW);
memcpy(stringpool.free, source, size);
stringpool.free += size;
} else
{ while(size > 0)
{
write = SIZEOF(emit_buff) - emit_buff_used;
write = size < write ? size : write;
memcpy(emit_buff + emit_buff_used, source, write);
size -= write;
source += write;
emit_buff_used += write;
psect_use_tab[current_psect] += write;
if (size)
buff_emit();
}
}
}
/*
* buff_emit
*
* Args: buffer pointer, number of bytes to emit
*/
void buff_emit(void)
{
uint4 stat;
if (-1 == write(object_file_des, emit_buff, emit_buff_used))
rts_error(VARLSTCNT(5) ERR_OBJFILERR, 2, object_name_len, object_file_name, errno);
emit_buff_used = 0;
}
void set_psect(unsigned char psect,unsigned char offset)
{
current_psect = psect;
return;
}
/*
* define_symbol
*
* Args: psect index, symbol name, symbol value.
*
* Description: Buffers a definition of a global symbol with the
* given name and value in the given psect.
*/
static struct sym_table *symbols;
struct sym_table *define_symbol(unsigned char psect, mstr *name, int4 value)
{
int cmp;
struct sym_table *sym, *sym1, *newsym;
sym = symbols;
sym1 = 0;
while(sym)
{
if ((cmp = memvcmp(name->addr, name->len, &sym->name[0], sym->name_len - 1)) <= 0)
break;
sym1 = sym;
sym = sym->next;
}
if (cmp || !sym)
{ newsym = (struct sym_table *) mcalloc(SIZEOF(struct sym_table) + name->len);
newsym->name_len = name->len + 1;
memcpy(&newsym->name[0], name->addr, name->len);
newsym->name[ name->len ] = 0;
newsym->n.n_strx = 0;
newsym->n.n_type = N_EXT;
if (psect == GTM_CODE)
newsym->n.n_type |= N_TEXT; /* if symbol is in GTM_CODE, it is defined */
else
txtrel_cnt++;
newsym->n.n_other = 0;
newsym->n.n_desc = 0;
newsym->n.n_value = value;
newsym->resolve = 0;
newsym->next = sym;
if (sym1)
sym1->next = newsym;
else
symbols = newsym;
cdlits++;
return 0;
}
if (!(sym->n.n_type & N_TEXT))
txtrel_cnt++;
return sym;
}
void resolve_sym(void)
{
uint4 symnum;
struct sym_table *sym;
struct rel_table *rel;
symnum = 0;
sym = symbols;
while (sym)
{ if (sym->resolve)
{ rel = sym->resolve;
while (rel)
{ rel->r.r_symbolnum = symnum;
rel = rel->resolve;
}
}
symnum++;
sym = sym->next;
}
}
void output_relocation(void)
{
struct rel_table *rel;
DEBUG_ONLY(int cnt;)
DEBUG_ONLY(cnt = 0;)
rel = text_rel;
while (rel)
{
emit_immed((char *)&rel->r, SIZEOF(rel->r));
rel = rel->next;
DEBUG_ONLY(cnt++;)
}
assert(cnt == txtrel_cnt_in_hdr);
DEBUG_ONLY(cnt = 0;)
rel = data_rel;
while (rel)
{
emit_immed((char *)&rel->r, SIZEOF(rel->r));
rel = rel->next;
DEBUG_ONLY(cnt++;)
}
assert(cnt == lit_addrs);
}
void output_symbol(void)
{
uint4 string_length;
struct sym_table *sym;
string_length = SIZEOF(int4);
sym = symbols;
while (sym)
{
sym->n.n_strx = string_length;
emit_immed((char *)&sym->n, SIZEOF(sym->n));
string_length += sym->name_len;
sym = sym->next;
}
emit_immed((char *)&string_length, SIZEOF(string_length));
sym = symbols;
while (sym)
{
emit_immed((char *)&sym->name[0], sym->name_len);
sym = sym->next;
}
}
void obj_init(void)
{
cdlits = txtrel_cnt = 0;
data_rel = text_rel = data_rel_end = text_rel_end = 0;
symbols = 0;
}
void emit_literals(void)
{
uint4 offset, padsize;
mliteral *p;
set_psect(GTM_LITERALS, 0);
offset = stringpool.free - stringpool.base;
emit_immed((char *)stringpool.base, offset);
/* comp_lits aligns the start of source path on a NATIVE_WSIZE boundary.*/
padsize = PADLEN(offset, NATIVE_WSIZE);
if (padsize)
{
emit_immed(PADCHARS, padsize);
offset += padsize;
}
emit_immed(source_file_name, source_name_len);
offset += source_name_len;
/* comp_lits aligns the start of routine_name on a NATIVE_WSIZE boundary.*/
padsize = PADLEN(offset, NATIVE_WSIZE);
if (padsize)
{
emit_immed(PADCHARS, padsize);
offset += padsize;
}
emit_immed(routine_name.addr, routine_name.len);
offset += routine_name.len;
/* comp_lits aligns the start of the literal area on a NATIVE_WSIZE boundary.*/
padsize = PADLEN(offset, NATIVE_WSIZE);
if (padsize)
{
emit_immed(PADCHARS, padsize);
offset += padsize;
}
dqloop(&literal_chain, que, p)
{
assert (p->rt_addr == offset);
MV_FORCE_NUMD(&p->v);
if (p->v.str.len)
emit_pidr(p->rt_addr + ((char *) &p->v.str.addr - (char *)&p->v),
p->v.str.addr - (char *) stringpool.base, (int4 *)&p->v.str.addr);
else
p->v.str.addr = 0;
emit_immed((char *)&p->v, SIZEOF(p->v));
offset += SIZEOF(p->v);
}
assert(lits_size == offset);
}

56
sr_arm/op_call.s Normal file
View File

@ -0,0 +1,56 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_callb
.type op_callb, %function
op_callb:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_callb, .-op_callb
.align 2
.global op_calll
.type op_calll, %function
op_calll:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_calll, .-op_calll
.align 2
.global op_callw
.type op_callw, %function
op_callw:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_callw, .-op_callw

56
sr_arm/op_callsp.s Normal file
View File

@ -0,0 +1,56 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_callspb
.type op_callspb, %function
op_callspb:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_callspb, .-op_callspb
.align 2
.global op_callspl
.type op_callspl, %function
op_callspl:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_callspl, .-op_callspl
.align 2
.global op_callspw
.type op_callspw, %function
op_callspw:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_callspw, .-op_callspw

27
sr_arm/op_contain.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_contain
.type op_contain, %function
op_contain:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_contain, .-op_contain

27
sr_arm/op_currtn.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_currtn
.type op_currtn, %function
op_currtn:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_currtn, .-op_currtn

27
sr_arm/op_equ.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_equ
.type op_equ, %function
op_equ:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_equ, .-op_equ

27
sr_arm/op_equnul.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_equnul
.type op_equnul, %function
op_equnul:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_equnul, .-op_equnul

27
sr_arm/op_exfun.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_exfun
.type op_exfun, %function
op_exfun:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_exfun, .-op_exfun

27
sr_arm/op_extcall.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_extcall
.type op_extcall, %function
op_extcall:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_extcall, .-op_extcall

27
sr_arm/op_extexfun.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_extexfun
.type op_extexfun, %function
op_extexfun:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_extexfun, .-op_extexfun

27
sr_arm/op_extjmp.s Normal file
View File

@ -0,0 +1,27 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_extjmp
.type op_extjmp, %function
op_extjmp:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_extjmp, .-op_extjmp

30
sr_arm/op_fetchintrrpt.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_fetchintrrpt
.type op_fetchintrrpt, %function
op_fetchintrrpt:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_fetchintrrpt, .-op_fetchintrrpt

30
sr_arm/op_fnget.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_fnget
.type op_fnget, %function
op_fnget:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_fnget, .-op_fnget

30
sr_arm/op_fnzextract.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_fnzextract
.type op_fnzextract, %function
op_fnzextract:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_fnzextract, .-op_fnzextract

30
sr_arm/op_follow.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_follow
.type op_follow, %function
op_follow:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_follow, .-op_follow

30
sr_arm/op_forcenum.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forcenum
.type op_forcenum, %function
op_forcenum:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forcenum, .-op_forcenum

30
sr_arm/op_forchk1.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forchk1
.type op_forchk1, %function
op_forchk1:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forchk1, .-op_forchk1

30
sr_arm/op_forinit.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forinit
.type op_forinit, %function
op_forinit:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forinit, .-op_forinit

30
sr_arm/op_forintrrpt.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forintrrpt
.type op_forintrrpt, %function
op_forintrrpt:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forintrrpt, .-op_forintrrpt

30
sr_arm/op_forlcldob.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forlcldob
.type op_forlcldob, %function
op_forlcldob:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forlcldob, .-op_forlcldob

30
sr_arm/op_forlcldol.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forlcldol
.type op_forlcldol, %function
op_forlcldol:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forlcldol, .-op_forlcldol

30
sr_arm/op_forlcldow.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forlcldow
.type op_forlcldow, %function
op_forlcldow:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forlcldow, .-op_forlcldow

30
sr_arm/op_forloop.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_forloop
.type op_forloop, %function
op_forloop:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_forloop, .-op_forloop

30
sr_arm/op_gettruth.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_gettruth
.type op_gettruth, %function
op_gettruth:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_gettruth, .-op_gettruth

30
sr_arm/op_iretmvad.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_iretmvad
.type op_iretmvad, %function
op_iretmvad:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_iretmvad, .-op_iretmvad

30
sr_arm/op_linefetch.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_linefetch
.type op_linefetch, %function
op_linefetch:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_linefetch, .-op_linefetch

30
sr_arm/op_linestart.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_linestart
.type op_linestart, %function
op_linestart:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_linestart, .-op_linestart

30
sr_arm/op_mprofcallb.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofcallb
.type op_mprofcallb, %function
op_mprofcallb:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofcallb, .-op_mprofcallb

30
sr_arm/op_mprofcalll.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofcalll
.type op_mprofcalll, %function
op_mprofcalll:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofcalll, .-op_mprofcalll

30
sr_arm/op_mprofcallspb.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofcallspb
.type op_mprofcallspb, %function
op_mprofcallspb:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofcallspb, .-op_mprofcallspb

30
sr_arm/op_mprofcallspl.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofcallspl
.type op_mprofcallspl, %function
op_mprofcallspl:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofcallspl, .-op_mprofcallspl

30
sr_arm/op_mprofcallspw.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofcallspw
.type op_mprofcallspw, %function
op_mprofcallspw:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofcallspw, .-op_mprofcallspw

30
sr_arm/op_mprofcallw.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofcallw
.type op_mprofcallw, %function
op_mprofcallw:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofcallw, .-op_mprofcallw

30
sr_arm/op_mprofexfun.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofexfun
.type op_mprofexfun, %function
op_mprofexfun:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofexfun, .-op_mprofexfun

30
sr_arm/op_mprofextcall.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofextcall
.type op_mprofextcall, %function
op_mprofextcall:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofextcall, .-op_mprofextcall

30
sr_arm/op_mprofextexfun.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofextexfun
.type op_mprofextexfun, %function
op_mprofextexfun:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofextexfun, .-op_mprofextexfun

30
sr_arm/op_mprofforchk1.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofforchk1
.type op_mprofforchk1, %function
op_mprofforchk1:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofforchk1, .-op_mprofforchk1

30
sr_arm/op_mprofforlcldob.s Normal file
View File

@ -0,0 +1,30 @@
#################################################################
# #
# Copyright 2001 Sanchez Computer Associates, Inc. #
# #
# This source code contains the intellectual property #
# of its copyright holder(s), and is made available #
# under a license. If you do not know the terms of #
# the license, please stop and do not read further. #
# #
#################################################################
.arch armv6
.fpu vfp
.text
.align 2
.global op_mprofforlcldob
.type op_mprofforlcldob, %function
op_mprofforlcldob:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
@ link register save eliminated.
str fp, [sp, #-4]!
add fp, sp, #0
mov r3, #0
mov r0, r3
add sp, fp, #0
ldmfd sp!, {fp}
bx lr
.size op_mprofforlcldob, .-op_mprofforlcldob

Some files were not shown because too many files have changed in this diff Show More